Lines Matching refs:st1w

131 ; CHECK-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
144 ; VBITS_GE_512-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
154 ; VBITS_EQ_256-DAG: st1w { [[RES_LO]].s }, [[PG]], [x0]
155 ; VBITS_EQ_256-DAG: st1w { [[RES_HI]].s }, [[PG]], [x[[A_HI]]
168 ; VBITS_GE_1024-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
181 ; VBITS_GE_2048-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
378 ; CHECK-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
391 ; VBITS_GE_512-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
401 ; VBITS_EQ_256-DAG: st1w { [[RES_LO]].s }, [[PG]], [x0]
402 ; VBITS_EQ_256-DAG: st1w { [[RES_HI]].s }, [[PG]], [x[[A_HI]]
415 ; VBITS_GE_1024-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
428 ; VBITS_GE_2048-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
625 ; CHECK-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
638 ; VBITS_GE_512-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
648 ; VBITS_EQ_256-DAG: st1w { [[RES_LO]].s }, [[PG]], [x0]
649 ; VBITS_EQ_256-DAG: st1w { [[RES_HI]].s }, [[PG]], [x[[A_HI]]
662 ; VBITS_GE_1024-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
675 ; VBITS_GE_2048-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
872 ; CHECK-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
885 ; VBITS_GE_512-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
895 ; VBITS_EQ_256-DAG: st1w { [[RES_LO]].s }, [[PG]], [x0]
896 ; VBITS_EQ_256-DAG: st1w { [[RES_HI]].s }, [[PG]], [x[[A_HI]]
909 ; VBITS_GE_1024-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
922 ; VBITS_GE_2048-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1119 ; CHECK-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1132 ; VBITS_GE_512-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1142 ; VBITS_EQ_256-DAG: st1w { [[RES_LO]].s }, [[PG]], [x0]
1143 ; VBITS_EQ_256-DAG: st1w { [[RES_HI]].s }, [[PG]], [x[[A_HI]]
1156 ; VBITS_GE_1024-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1169 ; VBITS_GE_2048-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1366 ; CHECK-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1379 ; VBITS_GE_512-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1389 ; VBITS_EQ_256-DAG: st1w { [[RES_LO]].s }, [[PG]], [x0]
1390 ; VBITS_EQ_256-DAG: st1w { [[RES_HI]].s }, [[PG]], [x[[A_HI]]
1403 ; VBITS_GE_1024-NEXT: st1w { [[RES]].s }, [[PG]], [x0]
1416 ; VBITS_GE_2048-NEXT: st1w { [[RES]].s }, [[PG]], [x0]