Lines Matching refs:orv

677 ; CHECK: orv b[[REDUCE:[0-9]+]], [[PG]], z0.b
688 ; CHECK: orv b[[REDUCE:[0-9]+]], [[PG]], z0.b
699 ; CHECK-NEXT: orv b[[REDUCE:[0-9]+]], [[PG]], [[OP]].b
711 ; VBITS_GE_512-NEXT: orv b[[REDUCE:[0-9]+]], [[PG]], [[OP]].b
721 ; VBITS_EQ_256-DAG: orv b[[REDUCE:[0-9]+]], [[PG]], [[OR]].b
734 ; VBITS_GE_1024-NEXT: orv b[[REDUCE:[0-9]+]], [[PG]], [[OP]].b
746 ; VBITS_GE_2048-NEXT: orv b[[REDUCE:[0-9]+]], [[PG]], [[OP]].b
758 ; CHECK: orv h[[REDUCE:[0-9]+]], [[PG]], z0.h
769 ; CHECK: orv h[[REDUCE:[0-9]+]], [[PG]], z0.h
780 ; CHECK-NEXT: orv h[[REDUCE:[0-9]+]], [[PG]], [[OP]].h
792 ; VBITS_GE_512-NEXT: orv h[[REDUCE:[0-9]+]], [[PG]], [[OP]].h
802 ; VBITS_EQ_256-DAG: orv h[[REDUCE:[0-9]+]], [[PG]], [[OR]].h
814 ; VBITS_GE_1024-NEXT: orv h[[REDUCE:[0-9]+]], [[PG]], [[OP]].h
826 ; VBITS_GE_2048-NEXT: orv h[[REDUCE:[0-9]+]], [[PG]], [[OP]].h
838 ; CHECK: orv [[REDUCE:s[0-9]+]], [[PG]], z0.s
849 ; CHECK: orv [[REDUCE:s[0-9]+]], [[PG]], z0.s
860 ; CHECK-NEXT: orv [[REDUCE:s[0-9]+]], [[PG]], [[OP]].s
872 ; VBITS_GE_512-NEXT: orv [[REDUCE:s[0-9]+]], [[PG]], [[OP]].s
882 ; VBITS_EQ_256-DAG: orv [[REDUCE:s[0-9]+]], [[PG]], [[OR]].s
894 ; VBITS_GE_1024-NEXT: orv [[REDUCE:s[0-9]+]], [[PG]], [[OP]].s
906 ; VBITS_GE_2048-NEXT: orv [[REDUCE:s[0-9]+]], [[PG]], [[OP]].s
927 ; CHECK: orv [[REDUCE:d[0-9]+]], [[PG]], z0.d
938 ; CHECK-NEXT: orv [[REDUCE:d[0-9]+]], [[PG]], [[OP]].d
950 ; VBITS_GE_512-NEXT: orv [[REDUCE:d[0-9]+]], [[PG]], [[OP]].d
960 ; VBITS_EQ_256-DAG: orv [[REDUCE:d[0-9]+]], [[PG]], [[OR]].d
972 ; VBITS_GE_1024-NEXT: orv [[REDUCE:d[0-9]+]], [[PG]], [[OP]].d
984 ; VBITS_GE_2048-NEXT: orv [[REDUCE:d[0-9]+]], [[PG]], [[OP]].d