Lines Matching refs:nxv16i8

17   %res = call i8 @llvm.vector.reduce.and.nxv16i8(<vscale x 16 x i8> %a)
63   %res = call i8 @llvm.vector.reduce.or.nxv16i8(<vscale x 16 x i8> %a)
109   %res = call i8 @llvm.vector.reduce.xor.nxv16i8(<vscale x 16 x i8> %a)
156   %res = call i8 @llvm.vector.reduce.add.nxv16i8(<vscale x 16 x i8> %a)
204   %res = call i8 @llvm.vector.reduce.umin.nxv16i8(<vscale x 16 x i8> %a)
250   %res = call i8 @llvm.vector.reduce.smin.nxv16i8(<vscale x 16 x i8> %a)
296   %res = call i8 @llvm.vector.reduce.umax.nxv16i8(<vscale x 16 x i8> %a)
342   %res = call i8 @llvm.vector.reduce.smax.nxv16i8(<vscale x 16 x i8> %a)
379 declare i8 @llvm.vector.reduce.and.nxv16i8(<vscale x 16 x i8>)
384 declare i8 @llvm.vector.reduce.or.nxv16i8(<vscale x 16 x i8>)
389 declare i8 @llvm.vector.reduce.xor.nxv16i8(<vscale x 16 x i8>)
394 declare i8 @llvm.vector.reduce.add.nxv16i8(<vscale x 16 x i8>)
399 declare i8 @llvm.vector.reduce.umin.nxv16i8(<vscale x 16 x i8>)
404 declare i8 @llvm.vector.reduce.smin.nxv16i8(<vscale x 16 x i8>)
409 declare i8 @llvm.vector.reduce.umax.nxv16i8(<vscale x 16 x i8>)
414 declare i8 @llvm.vector.reduce.smax.nxv16i8(<vscale x 16 x i8>)