Lines Matching refs:cmpls
1173 ; CHECK: cmpls p0.b, p0/z, z0.b, #4
1183 ; CHECK: cmpls p0.b, p0/z, z0.b, #4
1195 ; CHECK: cmpls p0.b, p0/z, z0.b, #4
1199 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpls.wide.nxv16i8(<vscale x 16 x i1> %pg,
1207 ; CHECK: cmpls p0.h, p0/z, z0.h, #0
1217 ; CHECK: cmpls p0.h, p0/z, z0.h, #0
1229 ; CHECK: cmpls p0.h, p0/z, z0.h, #0
1233 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpls.wide.nxv8i16(<vscale x 8 x i1> %pg,
1241 ; CHECK: cmpls p0.s, p0/z, z0.s, #68
1251 ; CHECK: cmpls p0.s, p0/z, z0.s, #68
1263 ; CHECK: cmpls p0.s, p0/z, z0.s, #68
1267 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpls.wide.nxv4i32(<vscale x 4 x i1> %pg,
1275 ; CHECK: cmpls p0.d, p0/z, z0.d, #127
1285 ; CHECK: cmpls p0.d, p0/z, z0.d, #127
1343 declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpls.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x …
1344 declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpls.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16…
1345 declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpls.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32…