Lines Matching refs:cmphi

415 ; CHECK: cmphi p0.b, p0/z, z0.b, z1.b
417   %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.nxv16i8(<vscale x 16 x i1> %pg,
425 ; CHECK: cmphi p0.h, p0/z, z0.h, z1.h
427   %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.nxv8i16(<vscale x 8 x i1> %pg,
435 ; CHECK: cmphi p0.s, p0/z, z0.s, z1.s
437   %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.nxv4i32(<vscale x 4 x i1> %pg,
445 ; CHECK: cmphi p0.d, p0/z, z0.d, z1.d
447   %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmphi.nxv2i64(<vscale x 2 x i1> %pg,
455 ; CHECK: cmphi p0.b, p0/z, z0.b, z1.d
457   %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.wide.nxv16i8(<vscale x 16 x i1> %pg,
465 ; CHECK: cmphi p0.h, p0/z, z0.h, z1.d
467   %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.wide.nxv8i16(<vscale x 8 x i1> %pg,
475 ; CHECK: cmphi p0.s, p0/z, z0.s, z1.d
477   %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.wide.nxv4i32(<vscale x 4 x i1> %pg,
486 ; CHECK-NEXT: cmphi p0.b, p0/z, z0.b, z1.b
495 ; CHECK-NEXT: cmphi p0.h, p0/z, z0.h, z1.h
504 ; CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z1.s
513 ; CHECK-NEXT: cmphi p0.d, p0/z, z0.d, z1.d
522 ; CHECK-NEXT: cmphi p0.b, p0/z, z1.b, z0.b
531 ; CHECK-NEXT: cmphi p0.h, p0/z, z1.h, z0.h
540 ; CHECK-NEXT: cmphi p0.s, p0/z, z1.s, z0.s
549 ; CHECK-NEXT: cmphi p0.d, p0/z, z1.d, z0.d
995 declare <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, …
996 declare <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <v…
997 declare <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <v…
998 declare <vscale x 2 x i1> @llvm.aarch64.sve.cmphi.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <v…
999 declare <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x …
1000 declare <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16…
1001 declare <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32…