Lines Matching refs:sqinch
18 define <vscale x 8 x i16> @sqinch(<vscale x 8 x i16> %a) {
19 ; CHECK-LABEL: sqinch:
20 ; CHECK: sqinch z0.h, pow2
22 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16> %a,
120 ; CHECK: sqinch x0, w0, vl5, mul #6
122 %out = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %a, i32 5, i32 6)
128 ; CHECK: sqinch x0, w0, vl3, mul #4
130 %out = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %a, i32 3, i32 4)
138 ; CHECK: sqinch x0, vl6, mul #7
140 %out = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %a, i32 6, i32 7)
313 declare <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16>, i32, i32)
320 declare i32 @llvm.aarch64.sve.sqinch.n32(i32, i32, i32)
321 declare i64 @llvm.aarch64.sve.sqinch.n64(i64, i32, i32)