Lines Matching refs:sve

1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
2 ; RUN: llc -O0 -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
16   call void @llvm.aarch64.sve.st1.nxv16i8(<vscale x 16 x i8> %data,
27   call void @llvm.aarch64.sve.st1.nxv8i8(<vscale x 8 x i8> %trunc,
38   call void @llvm.aarch64.sve.st1.nxv4i8(<vscale x 4 x i8> %trunc,
49   call void @llvm.aarch64.sve.st1.nxv2i8(<vscale x 2 x i8> %trunc,
63   call void @llvm.aarch64.sve.st1.nxv8i16(<vscale x 8 x i16> %data,
73   call void @llvm.aarch64.sve.st1.nxv8f16(<vscale x 8 x half> %data,
83   call void @llvm.aarch64.sve.st1.nxv8bf16(<vscale x 8 x bfloat> %data,
94   call void @llvm.aarch64.sve.st1.nxv4i16(<vscale x 4 x i16> %trunc,
105   call void @llvm.aarch64.sve.st1.nxv2i16(<vscale x 2 x i16> %trunc,
119   call void @llvm.aarch64.sve.st1.nxv4i32(<vscale x 4 x i32> %data,
129   call void @llvm.aarch64.sve.st1.nxv4f32(<vscale x 4 x float> %data,
140   call void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32> %trunc,
154   call void @llvm.aarch64.sve.st1.nxv2i64(<vscale x 2 x i64> %data,
164   call void @llvm.aarch64.sve.st1.nxv2f64(<vscale x 2 x double> %data,
170 declare void @llvm.aarch64.sve.st1.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i1>, i8*)
172 declare void @llvm.aarch64.sve.st1.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i1>, i8*)
173 declare void @llvm.aarch64.sve.st1.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i1>, i16*)
174 declare void @llvm.aarch64.sve.st1.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, half*)
175 declare void @llvm.aarch64.sve.st1.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x i1>, bfloat*)
177 declare void @llvm.aarch64.sve.st1.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i1>, i8*)
178 declare void @llvm.aarch64.sve.st1.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i1>, i16*)
179 declare void @llvm.aarch64.sve.st1.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32*)
180 declare void @llvm.aarch64.sve.st1.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, float*)
182 declare void @llvm.aarch64.sve.st1.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i1>, i8*)
183 declare void @llvm.aarch64.sve.st1.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, i16*)
184 declare void @llvm.aarch64.sve.st1.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, i32*)
185 declare void @llvm.aarch64.sve.st1.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, i64*)
186 declare void @llvm.aarch64.sve.st1.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, double*)
189 attributes #0 = { "target-features"="+sve,+bf16" }