Lines Matching refs:uqdech

18 define <vscale x 8 x i16> @uqdech(<vscale x 8 x i16> %a) {
19 ; CHECK-LABEL: uqdech:
20 ; CHECK: uqdech z0.h, pow2
22   %out = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %a,
110 ; CHECK: uqdech w0, vl5, mul #6
112   %out = call i32 @llvm.aarch64.sve.uqdech.n32(i32 %a, i32 5, i32 6)
118 ; CHECK: uqdech x0, vl6, mul #7
120   %out = call i64 @llvm.aarch64.sve.uqdech.n64(i64 %a, i32 6, i32 7)
233 declare <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqdech.n32(i32, i32, i32)
241 declare i64 @llvm.aarch64.sve.uqdech.n64(i64, i32, i32)