Lines Matching refs:half
12 define amdgpu_kernel void @fneg_fabs_fadd_f16(half addrspace(1)* %out, half %x, half %y) {
13 %fabs = call half @llvm.fabs.f16(half %x)
14 %fsub = fsub half -0.0, %fabs
15 %fadd = fadd half %y, %fsub
16 store half %fadd, half addrspace(1)* %out, align 2
30 define amdgpu_kernel void @fneg_fabs_fmul_f16(half addrspace(1)* %out, half %x, half %y) {
31 %fabs = call half @llvm.fabs.f16(half %x)
32 %fsub = fsub half -0.0, %fabs
33 %fmul = fmul half %y, %fsub
34 store half %fmul, half addrspace(1)* %out, align 2
44 define amdgpu_kernel void @fneg_fabs_free_f16(half addrspace(1)* %out, i16 %in) {
45 %bc = bitcast i16 %in to half
46 %fabs = call half @llvm.fabs.f16(half %bc)
47 %fsub = fsub half -0.0, %fabs
48 store half %fsub, half addrspace(1)* %out
54 define amdgpu_kernel void @fneg_fabs_f16(half addrspace(1)* %out, half %in) {
55 %fabs = call half @llvm.fabs.f16(half %in)
56 %fsub = fsub half -0.0, %fabs
57 store half %fsub, half addrspace(1)* %out, align 2
63 define amdgpu_kernel void @v_fneg_fabs_f16(half addrspace(1)* %out, half addrspace(1)* %in) {
64 %val = load half, half addrspace(1)* %in, align 2
65 %fabs = call half @llvm.fabs.f16(half %val)
66 %fsub = fsub half -0.0, %fabs
67 store half %fsub, half addrspace(1)* %out, align 2
78 define amdgpu_kernel void @s_fneg_fabs_v2f16_non_bc_src(<2 x half> addrspace(1)* %out, <2 x half> %…
79 %add = fadd <2 x half> %in, <half 1.0, half 2.0>
80 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %add)
81 %fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs
82 store <2 x half> %fneg.fabs, <2 x half> addrspace(1)* %out
92 define amdgpu_kernel void @s_fneg_fabs_v2f16_bc_src(<2 x half> addrspace(1)* %out, <2 x half> %in) {
93 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
94 %fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs
95 store <2 x half> %fneg.fabs, <2 x half> addrspace(1)* %out
104 define amdgpu_kernel void @fneg_fabs_v4f16(<4 x half> addrspace(1)* %out, <4 x half> %in) {
105 %fabs = call <4 x half> @llvm.fabs.v4f16(<4 x half> %in)
106 %fsub = fsub <4 x half> <half -0.0, half -0.0, half -0.0, half -0.0>, %fabs
107 store <4 x half> %fsub, <4 x half> addrspace(1)* %out
124 define amdgpu_kernel void @fold_user_fneg_fabs_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %in)…
125 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
126 %fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs
127 %mul = fmul <2 x half> %fneg.fabs, <half 4.0, half 4.0>
128 store <2 x half> %mul, <2 x half> addrspace(1)* %out
139 …el void @s_fneg_multi_use_fabs_v2f16(<2 x half> addrspace(1)* %out0, <2 x half> addrspace(1)* %out…
140 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
141 %fneg = fsub <2 x half> <half -0.0, half -0.0>, %fabs
142 store <2 x half> %fabs, <2 x half> addrspace(1)* %out0
143 store <2 x half> %fneg, <2 x half> addrspace(1)* %out1
150 …eg_multi_use_fabs_foldable_neg_v2f16(<2 x half> addrspace(1)* %out0, <2 x half> addrspace(1)* %out…
151 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
152 %fneg = fsub <2 x half> <half -0.0, half -0.0>, %fabs
153 %mul = fmul <2 x half> %fneg, <half 4.0, half 4.0>
154 store <2 x half> %fabs, <2 x half> addrspace(1)* %out0
155 store <2 x half> %mul, <2 x half> addrspace(1)* %out1
159 declare half @llvm.fabs.f16(half) #1
160 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
161 declare <4 x half> @llvm.fabs.v4f16(<4 x half>) #1