Lines Matching refs:RA
2 …=amdgcn -mcpu=gfx900 -run-pass=greedy -o - -verify-machineinstrs %s | FileCheck -check-prefix=RA %s
3 # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=greedy,virtregrewriter,post-RA-sched -o - -verify-m…
12 ; RA-LABEL: name: splitkit_copy_bundle
13 ; RA: bb.0:
14 ; RA: successors: %bb.1(0x80000000)
15 ; RA: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
16 ; RA: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
17 ; RA: undef %5.sub1:sgpr_1024 = S_MOV_B32 -1
18 ; RA: %5.sub0:sgpr_1024 = S_MOV_B32 -1
19 ; RA: undef %4.sub0_sub1:sgpr_1024 = COPY %5.sub0_sub1
20 ; RA: undef %3.sub0:sgpr_1024 = S_MOV_B32 0
21 ; RA: bb.1:
22 ; RA: successors: %bb.2(0x80000000)
23 ; RA: undef %6.sub0_sub1:sgpr_1024 = COPY %4.sub0_sub1
24 ; RA: %6.sub2:sgpr_1024 = COPY %6.sub0
25 ; RA: %6.sub3:sgpr_1024 = COPY %6.sub1
26 ; RA: %6.sub4:sgpr_1024 = COPY %6.sub0
27 ; RA: %6.sub5:sgpr_1024 = COPY %6.sub1
28 ; RA: %6.sub6:sgpr_1024 = COPY %6.sub0
29 ; RA: %6.sub7:sgpr_1024 = COPY %6.sub1
30 ; RA: %6.sub8:sgpr_1024 = COPY %6.sub0
31 ; RA: %6.sub9:sgpr_1024 = COPY %6.sub1
32 ; RA: %6.sub10:sgpr_1024 = COPY %6.sub0
33 ; RA: %6.sub11:sgpr_1024 = COPY %6.sub1
34 ; RA: %6.sub12:sgpr_1024 = COPY %6.sub0
35 ; RA: %6.sub13:sgpr_1024 = COPY %6.sub1
36 ; RA: %6.sub14:sgpr_1024 = COPY %6.sub0
37 ; RA: %6.sub15:sgpr_1024 = COPY %6.sub1
38 ; RA: %6.sub16:sgpr_1024 = COPY %6.sub0
39 ; RA: %6.sub17:sgpr_1024 = COPY %6.sub1
40 ; RA: %6.sub18:sgpr_1024 = COPY %6.sub0
41 ; RA: %6.sub19:sgpr_1024 = COPY %6.sub1
42 ; RA: %6.sub20:sgpr_1024 = COPY %6.sub0
43 ; RA: %6.sub21:sgpr_1024 = COPY %6.sub1
44 ; RA: %6.sub22:sgpr_1024 = COPY %6.sub0
45 ; RA: %6.sub23:sgpr_1024 = COPY %6.sub1
46 ; RA: %6.sub24:sgpr_1024 = COPY %6.sub0
47 ; RA: %6.sub25:sgpr_1024 = COPY %6.sub1
48 ; RA: %6.sub26:sgpr_1024 = COPY %6.sub0
49 ; RA: %6.sub27:sgpr_1024 = COPY %6.sub1
50 ; RA: %6.sub28:sgpr_1024 = COPY %6.sub0
51 ; RA: %6.sub29:sgpr_1024 = COPY %6.sub1
52 ; RA: undef %4.sub0_sub1:sgpr_1024 = COPY %6.sub0_sub1
53 ; RA: %3.sub1:sgpr_1024 = COPY %3.sub0
54 ; RA: %3.sub2:sgpr_1024 = COPY %3.sub0
55 ; RA: %3.sub3:sgpr_1024 = COPY %3.sub0
56 ; RA: %3.sub4:sgpr_1024 = COPY %3.sub0
57 ; RA: %3.sub5:sgpr_1024 = COPY %3.sub0
58 ; RA: %3.sub6:sgpr_1024 = COPY %3.sub0
59 ; RA: %3.sub7:sgpr_1024 = COPY %3.sub0
60 ; RA: %3.sub8:sgpr_1024 = COPY %3.sub0
61 ; RA: %3.sub9:sgpr_1024 = COPY %3.sub0
62 ; RA: %3.sub10:sgpr_1024 = COPY %3.sub0
63 ; RA: %3.sub11:sgpr_1024 = COPY %3.sub0
64 ; RA: %3.sub12:sgpr_1024 = COPY %3.sub0
65 ; RA: %3.sub13:sgpr_1024 = COPY %3.sub0
66 ; RA: %3.sub14:sgpr_1024 = COPY %3.sub0
67 ; RA: %3.sub15:sgpr_1024 = COPY %3.sub0
68 ; RA: %3.sub16:sgpr_1024 = COPY %3.sub0
69 ; RA: %3.sub17:sgpr_1024 = COPY %3.sub0
70 ; RA: %3.sub18:sgpr_1024 = COPY %3.sub0
71 ; RA: %3.sub19:sgpr_1024 = COPY %3.sub0
72 ; RA: %3.sub20:sgpr_1024 = COPY %3.sub0
73 ; RA: %3.sub21:sgpr_1024 = COPY %3.sub0
74 ; RA: %3.sub22:sgpr_1024 = COPY %3.sub0
75 ; RA: %3.sub23:sgpr_1024 = COPY %3.sub0
76 ; RA: %3.sub24:sgpr_1024 = COPY %3.sub0
77 ; RA: %3.sub25:sgpr_1024 = COPY %3.sub0
78 ; RA: %3.sub26:sgpr_1024 = COPY %3.sub0
79 ; RA: %3.sub27:sgpr_1024 = COPY %3.sub0
80 ; RA: %3.sub28:sgpr_1024 = COPY %3.sub0
81 ; RA: %3.sub29:sgpr_1024 = COPY %3.sub0
82 ; RA: %3.sub30:sgpr_1024 = COPY %3.sub0
83 ; RA: %3.sub31:sgpr_1024 = COPY %3.sub0
84 ; RA: bb.2:
85 ; RA: successors: %bb.1(0x40000000), %bb.2(0x40000000)
86 ; RA: S_NOP 0, csr_amdgpu_highregs, implicit [[DEF]], implicit [[DEF1]]
87 ; RA: S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
88 ; RA: S_BRANCH %bb.2
250 ; RA-LABEL: name: splitkit_copy_unbundle_reorder
251 ; RA: [[DEF:%[0-9]+]]:sgpr_128 = IMPLICIT_DEF
252 ; RA: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
253 ; RA: [[DEF2:%[0-9]+]]:sgpr_512 = IMPLICIT_DEF
254 ; RA: [[DEF2]].sub4:sgpr_512 = S_MOV_B32 -1
255 ; RA: [[DEF2]].sub5:sgpr_512 = S_MOV_B32 -1
256 ; RA: [[DEF2]].sub10:sgpr_512 = S_MOV_B32 -1
257 ; RA: [[DEF2]].sub11:sgpr_512 = S_MOV_B32 -1
258 ; RA: [[DEF2]].sub7:sgpr_512 = S_MOV_B32 -1
259 ; RA: [[DEF2]].sub8:sgpr_512 = S_MOV_B32 -1
260 ; RA: [[DEF2]].sub13:sgpr_512 = S_MOV_B32 -1
261 ; RA: [[DEF2]].sub14:sgpr_512 = S_MOV_B32 -1
262 ; RA: undef %15.sub4_sub5:sgpr_512 = COPY [[DEF2]].sub4_sub5 {
263 ; RA: internal %15.sub10_sub11:sgpr_512 = COPY [[DEF2]].sub10_sub11
264 ; RA: internal %15.sub7:sgpr_512 = COPY [[DEF2]].sub7
265 ; RA: internal %15.sub8:sgpr_512 = COPY [[DEF2]].sub8
266 ; RA: internal %15.sub13:sgpr_512 = COPY [[DEF2]].sub13
267 ; RA: internal %15.sub14:sgpr_512 = COPY [[DEF2]].sub14
268 ; RA: }
269 …; RA: SI_SPILL_S512_SAVE %15, %stack.0, implicit $exec, implicit $sgpr32 :: (store 64 into %stack.…
270 …; RA: S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr…
271 …; RA: [[SI_SPILL_S512_RESTORE:%[0-9]+]]:sgpr_512 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec,…
272 ; RA: undef %14.sub4_sub5:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub4_sub5 {
273 ; RA: internal %14.sub10_sub11:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub10_sub11
274 ; RA: internal %14.sub7:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub7
275 ; RA: internal %14.sub8:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub8
276 ; RA: internal %14.sub13:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub13
277 ; RA: internal %14.sub14:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub14
278 ; RA: }
279 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %…
280 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR1:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
281 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR2:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
282 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR3:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
283 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR4:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
284 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR5:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
285 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR6:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
286 …; RA: [[S_BUFFER_LOAD_DWORD_SGPR7:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], …
287 …; RA: S_NOP 0, implicit [[DEF]], implicit [[DEF1]], implicit [[S_BUFFER_LOAD_DWORD_SGPR]], implici…