Lines Matching refs:STATUS

24 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
25 ; CHECK-NEXT: cmp [[STATUS]], #0
47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
48 ; CHECK-NEXT: cmp [[STATUS]], #0
70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
71 ; CHECK-NEXT: cmp [[STATUS]], #0
96 ; CHECK-NEXT: strexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
97 ; CHECK-NEXT: cmp [[STATUS]], #0
120 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
121 ; CHECK-NEXT: cmp [[STATUS]], #0
143 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
144 ; CHECK-NEXT: cmp [[STATUS]], #0
166 ; CHECK-NEXT: strex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
167 ; CHECK-NEXT: cmp [[STATUS]], #0
192 ; CHECK-NEXT: stlexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
193 ; CHECK-NEXT: cmp [[STATUS]], #0
216 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
217 ; CHECK-NEXT: cmp [[STATUS]], #0
239 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
240 ; CHECK-NEXT: cmp [[STATUS]], #0
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
263 ; CHECK-NEXT: cmp [[STATUS]], #0
288 ; CHECK: strexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
289 ; CHECK-NEXT: cmp [[STATUS]], #0
312 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
313 ; CHECK-NEXT: cmp [[STATUS]], #0
335 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
336 ; CHECK-NEXT: cmp [[STATUS]], #0
358 ; CHECK-NEXT: strex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
359 ; CHECK-NEXT: cmp [[STATUS]], #0
384 ; CHECK: stlexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
385 ; CHECK-NEXT: cmp [[STATUS]], #0
408 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
409 ; CHECK-NEXT: cmp [[STATUS]], #0
431 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
432 ; CHECK-NEXT: cmp [[STATUS]], #0
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
455 ; CHECK-NEXT: cmp [[STATUS]], #0
480 ; CHECK: strexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
481 ; CHECK-NEXT: cmp [[STATUS]], #0
503 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
504 ; CHECK-NEXT: cmp [[STATUS]], #0
525 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
526 ; CHECK-NEXT: cmp [[STATUS]], #0
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
548 ; CHECK-NEXT: cmp [[STATUS]], #0
569 ; CHECK-NEXT: strexd [[STATUS:r[0-9]+]], r0, r1, [r[[ADDR]]]
570 ; CHECK-NEXT: cmp [[STATUS]], #0
596 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]]
597 ; CHECK-NEXT: cmp [[STATUS]], #0
622 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]
623 ; CHECK-NEXT: cmp [[STATUS]], #0
648 ; CHECK-NEXT: strex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
649 ; CHECK-NEXT: cmp [[STATUS]], #0
681 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
682 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
683 ; CHECK-NEXT: cmp [[STATUS]], #0
709 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]
710 ; CHECK-NEXT: cmp [[STATUS]], #0
735 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[OLDX]], [r[[ADDR]]]
736 ; CHECK-NEXT: cmp [[STATUS]], #0
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
762 ; CHECK-NEXT: cmp [[STATUS]], #0
794 ; CHECK-ARM: strexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
795 ; CHECK-THUMB: strexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
796 ; CHECK-NEXT: cmp [[STATUS]], #0
822 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
823 ; CHECK-NEXT: cmp [[STATUS]], #0
848 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
849 ; CHECK-NEXT: cmp [[STATUS]], #0
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
875 ; CHECK-NEXT: cmp [[STATUS]], #0
907 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
908 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
909 ; CHECK-NEXT: cmp [[STATUS]], #0
935 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
936 ; CHECK-NEXT: cmp [[STATUS]], #0
961 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
962 ; CHECK-NEXT: cmp [[STATUS]], #0
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
988 ; CHECK-NEXT: cmp [[STATUS]], #0
1020 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
1021 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
1022 ; CHECK-NEXT: cmp [[STATUS]], #0
1051 ; CHECK: strexb [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
1052 ; CHECK-NEXT: cmp [[STATUS]], #0
1085 ; CHECK: stlexh [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
1086 ; CHECK-NEXT: cmp [[STATUS]], #0
1118 ; CHECK: stlex [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
1119 ; CHECK-NEXT: cmp [[STATUS]], #0
1157 ; CHECK: strexd [[STATUS:r[0-9]+]], r2, r3, [r[[ADDR]]]
1158 ; CHECK-NEXT: cmp [[STATUS]], #0
1394 ; CHECK: stlexd [[STATUS:r[0-9]+]], r0, r1, {{.*}}[[ADDR]]
1395 ; CHECK-NEXT: cmp [[STATUS]], #0