Lines Matching refs:var8

6 @var8 = global i8 0
13    %old = atomicrmw add i8* @var8, i8 %offset seq_cst
16 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
17 ; CHECK: movt r[[ADDR]], :upper16:var8
109    %old = atomicrmw sub i8* @var8, i8 %offset monotonic
112 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
113 ; CHECK: movt r[[ADDR]], :upper16:var8
205    %old = atomicrmw and i8* @var8, i8 %offset release
208 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
209 ; CHECK: movt r[[ADDR]], :upper16:var8
301    %old = atomicrmw or i8* @var8, i8 %offset seq_cst
304 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
305 ; CHECK: movt r[[ADDR]], :upper16:var8
397    %old = atomicrmw xor i8* @var8, i8 %offset acquire
400 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
401 ; CHECK: movt r[[ADDR]], :upper16:var8
493    %old = atomicrmw xchg i8* @var8, i8 %offset monotonic
496 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
497 ; CHECK: movt r[[ADDR]], :upper16:var8
582    %old = atomicrmw min i8* @var8, i8 %offset acquire
585 ; CHECK-DAG: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
586 ; CHECK-DAG: movt [[ADDR]], :upper16:var8
695    %old = atomicrmw max i8* @var8, i8 %offset seq_cst
698 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
699 ; CHECK: movt [[ADDR]], :upper16:var8
808    %old = atomicrmw umin i8* @var8, i8 %offset monotonic
811 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
812 ; CHECK: movt [[ADDR]], :upper16:var8
921    %old = atomicrmw umax i8* @var8, i8 %offset acq_rel
924 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
925 ; CHECK: movt [[ADDR]], :upper16:var8
1034    %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new acquire acquire
1038 ; CHECK-DAG: movw r[[ADDR:[0-9]+]], :lower16:var8
1039 ; CHECK-DAG: movt r[[ADDR]], :upper16:var8
1174   %val = load atomic i8, i8* @var8 monotonic, align 1
1177 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1178 ; CHECK: movt r[[ADDR]], :upper16:var8
1204   %val = load atomic i8, i8* @var8 acquire, align 1
1207 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1210 ; CHECK: movt r[[ADDR]], :upper16:var8
1221   %val = load atomic i8, i8* @var8 seq_cst, align 1
1224 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1227 ; CHECK: movt r[[ADDR]], :upper16:var8
1289   store atomic i8 %val, i8* @var8 monotonic, align 1
1290 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1291 ; CHECK: movt r[[ADDR]], :upper16:var8
1314   store atomic i8 %val, i8* @var8 release, align 1
1317 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1320 ; CHECK: movt r[[ADDR]], :upper16:var8
1331   store atomic i8 %val, i8* @var8 seq_cst, align 1
1334 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1337 ; CHECK: movt r[[ADDR]], :upper16:var8