Lines Matching refs:f14
82 ; M3-NEXT: mov.d $f0, $f14
89 ; CMOV64-NEXT: mov.d $f0, $f14
98 ; 64R6-NEXT: sel.d $f0, $f14, $f13
130 ; M2-NEXT: mov.d $f0, $f14
137 ; CMOV32R1-NEXT: mov.d $f0, $f14
145 ; CMOV32R2-NEXT: mov.d $f0, $f14
156 ; 32R6-NEXT: sel.d $f0, $f14, $f12
184 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
194 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
205 ; M2-NEXT: c.olt.d $f12, $f14
209 ; M2-NEXT: mov.d $f0, $f14
216 ; CMOV32R1-NEXT: mov.d $f0, $f14
217 ; CMOV32R1-NEXT: c.olt.d $f12, $f14
223 ; CMOV32R2-NEXT: mov.d $f0, $f14
224 ; CMOV32R2-NEXT: c.olt.d $f12, $f14
230 ; 32R6-NEXT: cmp.lt.d $f0, $f12, $f14
234 ; 32R6-NEXT: sel.d $f0, $f14, $f12
264 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
265 ; MM32R3: c.olt.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
271 ; MM32R6-NEXT: cmp.lt.d $f0, $f12, $f14
274 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
285 ; M2-NEXT: c.ole.d $f12, $f14
289 ; M2-NEXT: mov.d $f0, $f14
296 ; CMOV32R1-NEXT: mov.d $f0, $f14
297 ; CMOV32R1-NEXT: c.ole.d $f12, $f14
303 ; CMOV32R2-NEXT: mov.d $f0, $f14
304 ; CMOV32R2-NEXT: c.ole.d $f12, $f14
310 ; 32R6-NEXT: cmp.le.d $f0, $f12, $f14
314 ; 32R6-NEXT: sel.d $f0, $f14, $f12
344 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
345 ; MM32R3: c.ole.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
351 ; MM32R6-NEXT: cmp.le.d $f0, $f12, $f14
354 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
365 ; M2-NEXT: c.ule.d $f12, $f14
369 ; M2-NEXT: mov.d $f0, $f14
376 ; CMOV32R1-NEXT: mov.d $f0, $f14
377 ; CMOV32R1-NEXT: c.ule.d $f12, $f14
383 ; CMOV32R2-NEXT: mov.d $f0, $f14
384 ; CMOV32R2-NEXT: c.ule.d $f12, $f14
390 ; 32R6-NEXT: cmp.lt.d $f0, $f14, $f12
394 ; 32R6-NEXT: sel.d $f0, $f14, $f12
424 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
425 ; MM32R3: c.ule.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
431 ; MM32R6-NEXT: cmp.lt.d $f0, $f14, $f12
434 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
445 ; M2-NEXT: c.ult.d $f12, $f14
449 ; M2-NEXT: mov.d $f0, $f14
456 ; CMOV32R1-NEXT: mov.d $f0, $f14
457 ; CMOV32R1-NEXT: c.ult.d $f12, $f14
463 ; CMOV32R2-NEXT: mov.d $f0, $f14
464 ; CMOV32R2-NEXT: c.ult.d $f12, $f14
470 ; 32R6-NEXT: cmp.le.d $f0, $f14, $f12
474 ; 32R6-NEXT: sel.d $f0, $f14, $f12
504 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
505 ; MM32R3: c.ult.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
511 ; MM32R6-NEXT: cmp.le.d $f0, $f14, $f12
514 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
525 ; M2-NEXT: c.eq.d $f12, $f14
529 ; M2-NEXT: mov.d $f0, $f14
536 ; CMOV32R1-NEXT: mov.d $f0, $f14
537 ; CMOV32R1-NEXT: c.eq.d $f12, $f14
543 ; CMOV32R2-NEXT: mov.d $f0, $f14
544 ; CMOV32R2-NEXT: c.eq.d $f12, $f14
550 ; 32R6-NEXT: cmp.eq.d $f0, $f12, $f14
554 ; 32R6-NEXT: sel.d $f0, $f14, $f12
584 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
585 ; MM32R3: c.eq.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
591 ; MM32R6-NEXT: cmp.eq.d $f0, $f12, $f14
594 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
605 ; M2-NEXT: c.ueq.d $f12, $f14
609 ; M2-NEXT: mov.d $f0, $f14
616 ; CMOV32R1-NEXT: mov.d $f0, $f14
617 ; CMOV32R1-NEXT: c.ueq.d $f12, $f14
623 ; CMOV32R2-NEXT: mov.d $f0, $f14
624 ; CMOV32R2-NEXT: c.ueq.d $f12, $f14
630 ; 32R6-NEXT: cmp.ueq.d $f0, $f12, $f14
635 ; 32R6-NEXT: sel.d $f0, $f14, $f12
666 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
667 ; MM32R3: c.ueq.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
673 ; MM32R6-NEXT: cmp.ueq.d $f0, $f12, $f14
677 ; MM32R6-NEXT: sel.d $f0, $f14, $f12