Lines Matching refs:PIC
3 …ot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
136 ; PIC-LABEL: name: expand_BEQ64
137 ; PIC: bb.0 (%ir-block.0):
138 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
139 ; PIC: BNE64 $a0_64, $zero_64, %bb.3, implicit-def $at {
140 ; PIC: NOP
141 ; PIC: }
142 ; PIC: bb.1 (%ir-block.0):
143 ; PIC: successors: %bb.2(0x80000000)
144 ; PIC: $sp_64 = DADDiu $sp_64, -16
145 ; PIC: SD $ra_64, $sp_64, 0
146 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
147 ; PIC: $at_64 = DSLL $at_64, 16
148 ; PIC: BAL_BR %bb.2, implicit-def $ra {
149 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
150 ; PIC: }
151 ; PIC: bb.2 (%ir-block.0):
152 ; PIC: successors: %bb.4(0x80000000)
153 ; PIC: $at_64 = DADDu $ra_64, $at_64
154 ; PIC: $ra_64 = LD $sp_64, 0
155 ; PIC: JR64 $at_64 {
156 ; PIC: $sp_64 = DADDiu $sp_64, 16
157 ; PIC: }
158 ; PIC: bb.3.iftrue:
159 ; PIC: INLINEASM &".space 131068", 1
160 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
161 ; PIC: $v0_64 = DADDiu $zero_64, 1
162 ; PIC: }
163 ; PIC: bb.4.tail:
164 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
165 ; PIC: $v0_64 = DADDiu $zero_64, 0
166 ; PIC: }
238 ; PIC-LABEL: name: expand_BNE64
239 ; PIC: bb.0 (%ir-block.0):
240 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
241 ; PIC: BEQ64 $a0_64, $zero_64, %bb.3, implicit-def $at {
242 ; PIC: NOP
243 ; PIC: }
244 ; PIC: bb.1 (%ir-block.0):
245 ; PIC: successors: %bb.2(0x80000000)
246 ; PIC: $sp_64 = DADDiu $sp_64, -16
247 ; PIC: SD $ra_64, $sp_64, 0
248 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
249 ; PIC: $at_64 = DSLL $at_64, 16
250 ; PIC: BAL_BR %bb.2, implicit-def $ra {
251 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
252 ; PIC: }
253 ; PIC: bb.2 (%ir-block.0):
254 ; PIC: successors: %bb.4(0x80000000)
255 ; PIC: $at_64 = DADDu $ra_64, $at_64
256 ; PIC: $ra_64 = LD $sp_64, 0
257 ; PIC: JR64 $at_64 {
258 ; PIC: $sp_64 = DADDiu $sp_64, 16
259 ; PIC: }
260 ; PIC: bb.3.iftrue:
261 ; PIC: INLINEASM &".space 131068", 1
262 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
263 ; PIC: $v0_64 = DADDiu $zero_64, 1
264 ; PIC: }
265 ; PIC: bb.4.tail:
266 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
267 ; PIC: $v0_64 = DADDiu $zero_64, 0
268 ; PIC: }
340 ; PIC-LABEL: name: expand_BGEZ64
341 ; PIC: bb.0 (%ir-block.0):
342 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
343 ; PIC: BLTZ64 $a0_64, %bb.3, implicit-def $at {
344 ; PIC: NOP
345 ; PIC: }
346 ; PIC: bb.1 (%ir-block.0):
347 ; PIC: successors: %bb.2(0x80000000)
348 ; PIC: $sp_64 = DADDiu $sp_64, -16
349 ; PIC: SD $ra_64, $sp_64, 0
350 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
351 ; PIC: $at_64 = DSLL $at_64, 16
352 ; PIC: BAL_BR %bb.2, implicit-def $ra {
353 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
354 ; PIC: }
355 ; PIC: bb.2 (%ir-block.0):
356 ; PIC: successors: %bb.4(0x80000000)
357 ; PIC: $at_64 = DADDu $ra_64, $at_64
358 ; PIC: $ra_64 = LD $sp_64, 0
359 ; PIC: JR64 $at_64 {
360 ; PIC: $sp_64 = DADDiu $sp_64, 16
361 ; PIC: }
362 ; PIC: bb.3.iftrue:
363 ; PIC: INLINEASM &".space 131068", 1
364 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
365 ; PIC: $v0_64 = DADDiu $zero_64, 1
366 ; PIC: }
367 ; PIC: bb.4.tail:
368 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
369 ; PIC: $v0_64 = DADDiu $zero_64, 0
370 ; PIC: }
442 ; PIC-LABEL: name: expand_BGTZ64
443 ; PIC: bb.0 (%ir-block.0):
444 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
445 ; PIC: BLEZ64 $a0_64, %bb.3, implicit-def $at {
446 ; PIC: NOP
447 ; PIC: }
448 ; PIC: bb.1 (%ir-block.0):
449 ; PIC: successors: %bb.2(0x80000000)
450 ; PIC: $sp_64 = DADDiu $sp_64, -16
451 ; PIC: SD $ra_64, $sp_64, 0
452 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
453 ; PIC: $at_64 = DSLL $at_64, 16
454 ; PIC: BAL_BR %bb.2, implicit-def $ra {
455 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
456 ; PIC: }
457 ; PIC: bb.2 (%ir-block.0):
458 ; PIC: successors: %bb.4(0x80000000)
459 ; PIC: $at_64 = DADDu $ra_64, $at_64
460 ; PIC: $ra_64 = LD $sp_64, 0
461 ; PIC: JR64 $at_64 {
462 ; PIC: $sp_64 = DADDiu $sp_64, 16
463 ; PIC: }
464 ; PIC: bb.3.iftrue:
465 ; PIC: INLINEASM &".space 131068", 1
466 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
467 ; PIC: $v0_64 = DADDiu $zero_64, 1
468 ; PIC: }
469 ; PIC: bb.4.tail:
470 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
471 ; PIC: $v0_64 = DADDiu $zero_64, 0
472 ; PIC: }
544 ; PIC-LABEL: name: expand_BLEZ64
545 ; PIC: bb.0 (%ir-block.0):
546 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
547 ; PIC: BGTZ64 $a0_64, %bb.3, implicit-def $at {
548 ; PIC: NOP
549 ; PIC: }
550 ; PIC: bb.1 (%ir-block.0):
551 ; PIC: successors: %bb.2(0x80000000)
552 ; PIC: $sp_64 = DADDiu $sp_64, -16
553 ; PIC: SD $ra_64, $sp_64, 0
554 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
555 ; PIC: $at_64 = DSLL $at_64, 16
556 ; PIC: BAL_BR %bb.2, implicit-def $ra {
557 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
558 ; PIC: }
559 ; PIC: bb.2 (%ir-block.0):
560 ; PIC: successors: %bb.4(0x80000000)
561 ; PIC: $at_64 = DADDu $ra_64, $at_64
562 ; PIC: $ra_64 = LD $sp_64, 0
563 ; PIC: JR64 $at_64 {
564 ; PIC: $sp_64 = DADDiu $sp_64, 16
565 ; PIC: }
566 ; PIC: bb.3.iftrue:
567 ; PIC: INLINEASM &".space 131068", 1
568 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
569 ; PIC: $v0_64 = DADDiu $zero_64, 1
570 ; PIC: }
571 ; PIC: bb.4.tail:
572 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
573 ; PIC: $v0_64 = DADDiu $zero_64, 0
574 ; PIC: }
646 ; PIC-LABEL: name: expand_BLTZ64
647 ; PIC: bb.0 (%ir-block.0):
648 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
649 ; PIC: BGEZ64 $a0_64, %bb.3, implicit-def $at {
650 ; PIC: NOP
651 ; PIC: }
652 ; PIC: bb.1 (%ir-block.0):
653 ; PIC: successors: %bb.2(0x80000000)
654 ; PIC: $sp_64 = DADDiu $sp_64, -16
655 ; PIC: SD $ra_64, $sp_64, 0
656 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
657 ; PIC: $at_64 = DSLL $at_64, 16
658 ; PIC: BAL_BR %bb.2, implicit-def $ra {
659 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
660 ; PIC: }
661 ; PIC: bb.2 (%ir-block.0):
662 ; PIC: successors: %bb.4(0x80000000)
663 ; PIC: $at_64 = DADDu $ra_64, $at_64
664 ; PIC: $ra_64 = LD $sp_64, 0
665 ; PIC: JR64 $at_64 {
666 ; PIC: $sp_64 = DADDiu $sp_64, 16
667 ; PIC: }
668 ; PIC: bb.3.iftrue:
669 ; PIC: INLINEASM &".space 131068", 1
670 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
671 ; PIC: $v0_64 = DADDiu $zero_64, 1
672 ; PIC: }
673 ; PIC: bb.4.tail:
674 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
675 ; PIC: $v0_64 = DADDiu $zero_64, 0
676 ; PIC: }