Lines Matching refs:PIC
3 …ot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
201 ; PIC-LABEL: name: expand_BNEZC64
202 ; PIC: bb.0 (%ir-block.0):
203 ; PIC: successors: %bb.1(0x40000000), %bb.2(0x40000000)
204 ; PIC: BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
205 ; PIC: bb.1.iftrue:
206 ; PIC: INLINEASM &".space 831068", 1
207 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
208 ; PIC: $v0_64 = DADDiu $zero_64, 1
209 ; PIC: }
210 ; PIC: bb.2.tail:
211 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
212 ; PIC: $v0_64 = DADDiu $zero_64, 0
213 ; PIC: }
278 ; PIC-LABEL: name: expand_BEQZC64
279 ; PIC: bb.0 (%ir-block.0):
280 ; PIC: successors: %bb.1(0x40000000), %bb.2(0x40000000)
281 ; PIC: BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
282 ; PIC: bb.1.iftrue:
283 ; PIC: INLINEASM &".space 831068", 1
284 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
285 ; PIC: $v0_64 = DADDiu $zero_64, 1
286 ; PIC: }
287 ; PIC: bb.2.tail:
288 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
289 ; PIC: $v0_64 = DADDiu $zero_64, 0
290 ; PIC: }
360 ; PIC-LABEL: name: expand_BNEC64
361 ; PIC: bb.0 (%ir-block.0):
362 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
363 ; PIC: BEQC64 $a0_64, $zero_64, %bb.3, implicit-def $at
364 ; PIC: bb.1 (%ir-block.0):
365 ; PIC: successors: %bb.2(0x80000000)
366 ; PIC: $sp_64 = DADDiu $sp_64, -16
367 ; PIC: SD $ra_64, $sp_64, 0
368 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
369 ; PIC: $at_64 = DSLL $at_64, 16
370 ; PIC: BAL_BR %bb.2, implicit-def $ra {
371 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
372 ; PIC: }
373 ; PIC: bb.2 (%ir-block.0):
374 ; PIC: successors: %bb.4(0x80000000)
375 ; PIC: $at_64 = DADDu $ra_64, $at_64
376 ; PIC: $ra_64 = LD $sp_64, 0
377 ; PIC: JR64 $at_64 {
378 ; PIC: $sp_64 = DADDiu $sp_64, 16
379 ; PIC: }
380 ; PIC: bb.3.iftrue:
381 ; PIC: INLINEASM &".space 831068", 1
382 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
383 ; PIC: $v0_64 = DADDiu $zero_64, 1
384 ; PIC: }
385 ; PIC: bb.4.tail:
386 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
387 ; PIC: $v0_64 = DADDiu $zero_64, 0
388 ; PIC: }
458 ; PIC-LABEL: name: expand_BEQC64
459 ; PIC: bb.0 (%ir-block.0):
460 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
461 ; PIC: BNEC64 $a0_64, $zero_64, %bb.3, implicit-def $at
462 ; PIC: bb.1 (%ir-block.0):
463 ; PIC: successors: %bb.2(0x80000000)
464 ; PIC: $sp_64 = DADDiu $sp_64, -16
465 ; PIC: SD $ra_64, $sp_64, 0
466 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
467 ; PIC: $at_64 = DSLL $at_64, 16
468 ; PIC: BAL_BR %bb.2, implicit-def $ra {
469 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
470 ; PIC: }
471 ; PIC: bb.2 (%ir-block.0):
472 ; PIC: successors: %bb.4(0x80000000)
473 ; PIC: $at_64 = DADDu $ra_64, $at_64
474 ; PIC: $ra_64 = LD $sp_64, 0
475 ; PIC: JR64 $at_64 {
476 ; PIC: $sp_64 = DADDiu $sp_64, 16
477 ; PIC: }
478 ; PIC: bb.3.iftrue:
479 ; PIC: INLINEASM &".space 831068", 1
480 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
481 ; PIC: $v0_64 = DADDiu $zero_64, 1
482 ; PIC: }
483 ; PIC: bb.4.tail:
484 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
485 ; PIC: $v0_64 = DADDiu $zero_64, 0
486 ; PIC: }
556 ; PIC-LABEL: name: expand_BLTC64
557 ; PIC: bb.0 (%ir-block.0):
558 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
559 ; PIC: BGEC64 $a0_64, $zero_64, %bb.3, implicit-def $at
560 ; PIC: bb.1 (%ir-block.0):
561 ; PIC: successors: %bb.2(0x80000000)
562 ; PIC: $sp_64 = DADDiu $sp_64, -16
563 ; PIC: SD $ra_64, $sp_64, 0
564 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
565 ; PIC: $at_64 = DSLL $at_64, 16
566 ; PIC: BAL_BR %bb.2, implicit-def $ra {
567 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
568 ; PIC: }
569 ; PIC: bb.2 (%ir-block.0):
570 ; PIC: successors: %bb.4(0x80000000)
571 ; PIC: $at_64 = DADDu $ra_64, $at_64
572 ; PIC: $ra_64 = LD $sp_64, 0
573 ; PIC: JR64 $at_64 {
574 ; PIC: $sp_64 = DADDiu $sp_64, 16
575 ; PIC: }
576 ; PIC: bb.3.iftrue:
577 ; PIC: INLINEASM &".space 831068", 1
578 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
579 ; PIC: $v0_64 = DADDiu $zero_64, 1
580 ; PIC: }
581 ; PIC: bb.4.tail:
582 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
583 ; PIC: $v0_64 = DADDiu $zero_64, 0
584 ; PIC: }
654 ; PIC-LABEL: name: expand_BLTUC64
655 ; PIC: bb.0 (%ir-block.0):
656 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
657 ; PIC: BGEUC64 $a0_64, $zero_64, %bb.3, implicit-def $at
658 ; PIC: bb.1 (%ir-block.0):
659 ; PIC: successors: %bb.2(0x80000000)
660 ; PIC: $sp_64 = DADDiu $sp_64, -16
661 ; PIC: SD $ra_64, $sp_64, 0
662 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
663 ; PIC: $at_64 = DSLL $at_64, 16
664 ; PIC: BAL_BR %bb.2, implicit-def $ra {
665 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
666 ; PIC: }
667 ; PIC: bb.2 (%ir-block.0):
668 ; PIC: successors: %bb.4(0x80000000)
669 ; PIC: $at_64 = DADDu $ra_64, $at_64
670 ; PIC: $ra_64 = LD $sp_64, 0
671 ; PIC: JR64 $at_64 {
672 ; PIC: $sp_64 = DADDiu $sp_64, 16
673 ; PIC: }
674 ; PIC: bb.3.iftrue:
675 ; PIC: INLINEASM &".space 831068", 1
676 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
677 ; PIC: $v0_64 = DADDiu $zero_64, 1
678 ; PIC: }
679 ; PIC: bb.4.tail:
680 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
681 ; PIC: $v0_64 = DADDiu $zero_64, 0
682 ; PIC: }
752 ; PIC-LABEL: name: expand_BGEC64
753 ; PIC: bb.0 (%ir-block.0):
754 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
755 ; PIC: BLTC64 $a0_64, $zero_64, %bb.3, implicit-def $at
756 ; PIC: bb.1 (%ir-block.0):
757 ; PIC: successors: %bb.2(0x80000000)
758 ; PIC: $sp_64 = DADDiu $sp_64, -16
759 ; PIC: SD $ra_64, $sp_64, 0
760 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
761 ; PIC: $at_64 = DSLL $at_64, 16
762 ; PIC: BAL_BR %bb.2, implicit-def $ra {
763 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
764 ; PIC: }
765 ; PIC: bb.2 (%ir-block.0):
766 ; PIC: successors: %bb.4(0x80000000)
767 ; PIC: $at_64 = DADDu $ra_64, $at_64
768 ; PIC: $ra_64 = LD $sp_64, 0
769 ; PIC: JR64 $at_64 {
770 ; PIC: $sp_64 = DADDiu $sp_64, 16
771 ; PIC: }
772 ; PIC: bb.3.iftrue:
773 ; PIC: INLINEASM &".space 831068", 1
774 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
775 ; PIC: $v0_64 = DADDiu $zero_64, 1
776 ; PIC: }
777 ; PIC: bb.4.tail:
778 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
779 ; PIC: $v0_64 = DADDiu $zero_64, 0
780 ; PIC: }
850 ; PIC-LABEL: name: expand_BGEUC64
851 ; PIC: bb.0 (%ir-block.0):
852 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
853 ; PIC: BLTUC64 $a0_64, $zero_64, %bb.3, implicit-def $at
854 ; PIC: bb.1 (%ir-block.0):
855 ; PIC: successors: %bb.2(0x80000000)
856 ; PIC: $sp_64 = DADDiu $sp_64, -16
857 ; PIC: SD $ra_64, $sp_64, 0
858 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
859 ; PIC: $at_64 = DSLL $at_64, 16
860 ; PIC: BAL_BR %bb.2, implicit-def $ra {
861 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
862 ; PIC: }
863 ; PIC: bb.2 (%ir-block.0):
864 ; PIC: successors: %bb.4(0x80000000)
865 ; PIC: $at_64 = DADDu $ra_64, $at_64
866 ; PIC: $ra_64 = LD $sp_64, 0
867 ; PIC: JR64 $at_64 {
868 ; PIC: $sp_64 = DADDiu $sp_64, 16
869 ; PIC: }
870 ; PIC: bb.3.iftrue:
871 ; PIC: INLINEASM &".space 831068", 1
872 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
873 ; PIC: $v0_64 = DADDiu $zero_64, 1
874 ; PIC: }
875 ; PIC: bb.4.tail:
876 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
877 ; PIC: $v0_64 = DADDiu $zero_64, 0
878 ; PIC: }
948 ; PIC-LABEL: name: expand_BLEZC64
949 ; PIC: bb.0 (%ir-block.0):
950 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
951 ; PIC: BGTZC64 $a0_64, %bb.3, implicit-def $at
952 ; PIC: bb.1 (%ir-block.0):
953 ; PIC: successors: %bb.2(0x80000000)
954 ; PIC: $sp_64 = DADDiu $sp_64, -16
955 ; PIC: SD $ra_64, $sp_64, 0
956 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
957 ; PIC: $at_64 = DSLL $at_64, 16
958 ; PIC: BAL_BR %bb.2, implicit-def $ra {
959 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
960 ; PIC: }
961 ; PIC: bb.2 (%ir-block.0):
962 ; PIC: successors: %bb.4(0x80000000)
963 ; PIC: $at_64 = DADDu $ra_64, $at_64
964 ; PIC: $ra_64 = LD $sp_64, 0
965 ; PIC: JR64 $at_64 {
966 ; PIC: $sp_64 = DADDiu $sp_64, 16
967 ; PIC: }
968 ; PIC: bb.3.iftrue:
969 ; PIC: INLINEASM &".space 831068", 1
970 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
971 ; PIC: $v0_64 = DADDiu $zero_64, 1
972 ; PIC: }
973 ; PIC: bb.4.tail:
974 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
975 ; PIC: $v0_64 = DADDiu $zero_64, 0
976 ; PIC: }
1046 ; PIC-LABEL: name: expand_BLTZC64
1047 ; PIC: bb.0 (%ir-block.0):
1048 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1049 ; PIC: BGEZC64 $a0_64, %bb.3, implicit-def $at
1050 ; PIC: bb.1 (%ir-block.0):
1051 ; PIC: successors: %bb.2(0x80000000)
1052 ; PIC: $sp_64 = DADDiu $sp_64, -16
1053 ; PIC: SD $ra_64, $sp_64, 0
1054 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
1055 ; PIC: $at_64 = DSLL $at_64, 16
1056 ; PIC: BAL_BR %bb.2, implicit-def $ra {
1057 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
1058 ; PIC: }
1059 ; PIC: bb.2 (%ir-block.0):
1060 ; PIC: successors: %bb.4(0x80000000)
1061 ; PIC: $at_64 = DADDu $ra_64, $at_64
1062 ; PIC: $ra_64 = LD $sp_64, 0
1063 ; PIC: JR64 $at_64 {
1064 ; PIC: $sp_64 = DADDiu $sp_64, 16
1065 ; PIC: }
1066 ; PIC: bb.3.iftrue:
1067 ; PIC: INLINEASM &".space 831068", 1
1068 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1069 ; PIC: $v0_64 = DADDiu $zero_64, 1
1070 ; PIC: }
1071 ; PIC: bb.4.tail:
1072 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1073 ; PIC: $v0_64 = DADDiu $zero_64, 0
1074 ; PIC: }
1144 ; PIC-LABEL: name: expand_BGEZC64
1145 ; PIC: bb.0 (%ir-block.0):
1146 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1147 ; PIC: BLTZC64 $a0_64, %bb.3, implicit-def $at
1148 ; PIC: bb.1 (%ir-block.0):
1149 ; PIC: successors: %bb.2(0x80000000)
1150 ; PIC: $sp_64 = DADDiu $sp_64, -16
1151 ; PIC: SD $ra_64, $sp_64, 0
1152 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
1153 ; PIC: $at_64 = DSLL $at_64, 16
1154 ; PIC: BAL_BR %bb.2, implicit-def $ra {
1155 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
1156 ; PIC: }
1157 ; PIC: bb.2 (%ir-block.0):
1158 ; PIC: successors: %bb.4(0x80000000)
1159 ; PIC: $at_64 = DADDu $ra_64, $at_64
1160 ; PIC: $ra_64 = LD $sp_64, 0
1161 ; PIC: JR64 $at_64 {
1162 ; PIC: $sp_64 = DADDiu $sp_64, 16
1163 ; PIC: }
1164 ; PIC: bb.3.iftrue:
1165 ; PIC: INLINEASM &".space 831068", 1
1166 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1167 ; PIC: $v0_64 = DADDiu $zero_64, 1
1168 ; PIC: }
1169 ; PIC: bb.4.tail:
1170 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1171 ; PIC: $v0_64 = DADDiu $zero_64, 0
1172 ; PIC: }
1242 ; PIC-LABEL: name: expand_BGTZC64
1243 ; PIC: bb.0 (%ir-block.0):
1244 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1245 ; PIC: BLEZC64 $a0_64, %bb.3, implicit-def $at
1246 ; PIC: bb.1 (%ir-block.0):
1247 ; PIC: successors: %bb.2(0x80000000)
1248 ; PIC: $sp_64 = DADDiu $sp_64, -16
1249 ; PIC: SD $ra_64, $sp_64, 0
1250 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
1251 ; PIC: $at_64 = DSLL $at_64, 16
1252 ; PIC: BAL_BR %bb.2, implicit-def $ra {
1253 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
1254 ; PIC: }
1255 ; PIC: bb.2 (%ir-block.0):
1256 ; PIC: successors: %bb.4(0x80000000)
1257 ; PIC: $at_64 = DADDu $ra_64, $at_64
1258 ; PIC: $ra_64 = LD $sp_64, 0
1259 ; PIC: JR64 $at_64 {
1260 ; PIC: $sp_64 = DADDiu $sp_64, 16
1261 ; PIC: }
1262 ; PIC: bb.3.iftrue:
1263 ; PIC: INLINEASM &".space 831068", 1
1264 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1265 ; PIC: $v0_64 = DADDiu $zero_64, 1
1266 ; PIC: }
1267 ; PIC: bb.4.tail:
1268 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1269 ; PIC: $v0_64 = DADDiu $zero_64, 0
1270 ; PIC: }