Lines Matching refs:vsx

22   %2 = call <2 x double> @llvm.ppc.vsx.xvdivdp(<2 x double> %0, <2 x double> %1)
34   %2 = call <4 x float> @llvm.ppc.vsx.xvdivsp(<4 x float> %0, <4 x float> %1)
70   %2 = call <2 x i64> @llvm.ppc.vsx.xvcmpeqdp(<2 x double> %0, <2 x double> %1)
82   %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpeqsp(<4 x float> %0, <4 x float> %1)
94   %2 = call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %0, <2 x double> %1)
106   %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %0, <4 x float> %1)
118   %2 = call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %0, <2 x double> %1)
130   %2 = call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %0, <4 x float> %1)
143   %1 = call <4 x float> @llvm.ppc.vsx.xvresp(<4 x float> %0)
155   %1 = call <2 x double> @llvm.ppc.vsx.xvredp(<2 x double> %0)
164   %0 = tail call <4 x i32> @llvm.ppc.vsx.xvcvdpsxws(<2 x double> %a)
173   %0 = tail call <4 x i32> @llvm.ppc.vsx.xvcvdpuxws(<2 x double> %a)
182   %0 = tail call <2 x double> @llvm.ppc.vsx.xvcvsxwdp(<4 x i32> %a)
191   %0 = tail call <2 x double> @llvm.ppc.vsx.xvcvuxwdp(<4 x i32> %a)
200   %0 = tail call <2 x double> @llvm.ppc.vsx.xvcvspdp(<4 x float> %a)
209   %0 = tail call <4 x float> @llvm.ppc.vsx.xvcvsxdsp(<2 x i64> %a)
218   %0 = tail call <4 x float> @llvm.ppc.vsx.xvcvuxdsp(<2 x i64> %a)
227   %0 = tail call <4 x float> @llvm.ppc.vsx.xvcvdpsp(<2 x double> %a)
236 declare <4 x float> @llvm.ppc.vsx.xvresp(<4 x float>)
239 declare <2 x double> @llvm.ppc.vsx.xvredp(<2 x double>)
248 declare <2 x double> @llvm.ppc.vsx.xvdivdp(<2 x double>, <2 x double>)
251 declare <4 x float> @llvm.ppc.vsx.xvdivsp(<4 x float>, <4 x float>)
254 declare <2 x i64> @llvm.ppc.vsx.xvcmpeqdp(<2 x double>, <2 x double>)
257 declare <4 x i32> @llvm.ppc.vsx.xvcmpeqsp(<4 x float>, <4 x float>)
260 declare <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double>, <2 x double>)
263 declare <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float>, <4 x float>)
266 declare <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double>, <2 x double>)
269 declare <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float>, <4 x float>)
270 declare <4 x float> @llvm.ppc.vsx.xvcvdpsp(<2 x double>) #1
271 declare <4 x i32> @llvm.ppc.vsx.xvcvdpsxws(<2 x double>) #1
272 declare <4 x i32> @llvm.ppc.vsx.xvcvdpuxws(<2 x double>) #1
273 declare <2 x double> @llvm.ppc.vsx.xvcvsxwdp(<4 x i32>) #1
274 declare <2 x double> @llvm.ppc.vsx.xvcvuxwdp(<4 x i32>) #1
275 declare <2 x double> @llvm.ppc.vsx.xvcvspdp(<4 x float>) #1
276 declare <4 x float> @llvm.ppc.vsx.xvcvsxdsp(<2 x i64>) #1
277 declare <4 x float> @llvm.ppc.vsx.xvcvuxdsp(<2 x i64>) #1