Lines Matching refs:altivec

12 declare i32 @llvm.ppc.altivec.vextractbm(<16 x i8>)
13 declare i32 @llvm.ppc.altivec.vextracthm(<8 x i16>)
14 declare i32 @llvm.ppc.altivec.vextractwm(<4 x i32>)
15 declare i32 @llvm.ppc.altivec.vextractdm(<2 x i64>)
16 declare i32 @llvm.ppc.altivec.vextractqm(<1 x i128>)
24   %ext = tail call i32 @llvm.ppc.altivec.vextractbm(<16 x i8> %a)
34   %ext = tail call i32 @llvm.ppc.altivec.vextracthm(<8 x i16> %a)
44   %ext = tail call i32 @llvm.ppc.altivec.vextractwm(<4 x i32> %a)
54   %ext = tail call i32 @llvm.ppc.altivec.vextractdm(<2 x i64> %a)
64   %ext = tail call i32 @llvm.ppc.altivec.vextractqm(<1 x i128> %a)
68 declare <16 x i8> @llvm.ppc.altivec.vexpandbm(<16 x i8>)
69 declare <8 x i16> @llvm.ppc.altivec.vexpandhm(<8 x i16>)
70 declare <4 x i32> @llvm.ppc.altivec.vexpandwm(<4 x i32>)
71 declare <2 x i64> @llvm.ppc.altivec.vexpanddm(<2 x i64>)
72 declare <1 x i128> @llvm.ppc.altivec.vexpandqm(<1 x i128>)
80   %exp = tail call <16 x i8> @llvm.ppc.altivec.vexpandbm(<16 x i8> %a)
90   %exp = tail call <8 x i16> @llvm.ppc.altivec.vexpandhm(<8 x i16> %a)
100   %exp = tail call <4 x i32> @llvm.ppc.altivec.vexpandwm(<4 x i32> %a)
110   %exp = tail call <2 x i64> @llvm.ppc.altivec.vexpanddm(<2 x i64> %a)
120   %exp = tail call <1 x i128> @llvm.ppc.altivec.vexpandqm(<1 x i128> %a)
124 declare i64 @llvm.ppc.altivec.vcntmbb(<16 x i8>, i32)
125 declare i64 @llvm.ppc.altivec.vcntmbh(<8 x i16>, i32)
126 declare i64 @llvm.ppc.altivec.vcntmbw(<4 x i32>, i32)
127 declare i64 @llvm.ppc.altivec.vcntmbd(<2 x i64>, i32)
135   %cnt = tail call i64 @llvm.ppc.altivec.vcntmbb(<16 x i8> %a, i32 1)
145   %cnt = tail call i64 @llvm.ppc.altivec.vcntmbh(<8 x i16> %a, i32 0)
155   %cnt = tail call i64 @llvm.ppc.altivec.vcntmbw(<4 x i32> %a, i32 1)
165   %cnt = tail call i64 @llvm.ppc.altivec.vcntmbd(<2 x i64> %a, i32 0)
169 declare <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64)
170 declare <8 x i16> @llvm.ppc.altivec.mtvsrhm(i64)
171 declare <4 x i32> @llvm.ppc.altivec.mtvsrwm(i64)
172 declare <2 x i64> @llvm.ppc.altivec.mtvsrdm(i64)
173 declare <1 x i128> @llvm.ppc.altivec.mtvsrqm(i64)
181   %mv = tail call <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64 %a)
191   %mv = tail call <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64 1)
201   %mv = tail call <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64 255)
211   %mv = tail call <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64 65535)
221   %mv = tail call <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64 65536)
231   %mv = tail call <16 x i8> @llvm.ppc.altivec.mtvsrbm(i64 65546)
241   %mv = tail call <8 x i16> @llvm.ppc.altivec.mtvsrhm(i64 %a)
251   %mv = tail call <4 x i32> @llvm.ppc.altivec.mtvsrwm(i64 %a)
261   %mv = tail call <2 x i64> @llvm.ppc.altivec.mtvsrdm(i64 %a)
271   %mv = tail call <1 x i128> @llvm.ppc.altivec.mtvsrqm(i64 %a)