Lines Matching refs:lsll

5 declare {i32, i32} @llvm.arm.mve.lsll(i32, i32, i32)
30 ; CHECK-NEXT:    lsll r0, r1, #3
36   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 3)
50 ; CHECK-NEXT:    lsll r0, r1, #3
76   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -3)
111 ; CHECK-NEXT:    lsll r0, r1, #31
117   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 31)
131 ; CHECK-NEXT:    lsll r0, r1, #31
157   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -31)
192 ; CHECK-NEXT:    lsll r0, r1, #32
198   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 32)
212 ; CHECK-NEXT:    lsll r0, r1, #32
238   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -32)
275 ; CHECK-NEXT:    lsll r0, r1, r2
281   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 44)
317 ; CHECK-NEXT:    lsll r0, r1, r2
323   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -44)
365 ; CHECK-NEXT:    lsll r0, r1, #3
372   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 3)
387 ; CHECK-NEXT:    lsll r0, r1, #3
416   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -3)
454 ; CHECK-NEXT:    lsll r0, r1, #31
461   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 31)
476 ; CHECK-NEXT:    lsll r0, r1, #31
505   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -31)
543 ; CHECK-NEXT:    lsll r0, r1, #32
550   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 32)
565 ; CHECK-NEXT:    lsll r0, r1, #32
594   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -32)
634 ; CHECK-NEXT:    lsll r0, r1, r2
641   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 44)
680 ; CHECK-NEXT:    lsll r0, r1, r2
687   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -44)
726 ; CHECK-NEXT:    lsll r0, r1, #3
733   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 3)
748 ; CHECK-NEXT:    lsll r0, r1, #3
777   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -3)
815 ; CHECK-NEXT:    lsll r0, r1, #32
822   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 32)
837 ; CHECK-NEXT:    lsll r0, r1, #32
866   %3 = call { i32, i32 } @llvm.arm.mve.lsll(i32 %2, i32 %1, i32 -32)