Lines Matching refs:v8i1

5 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
15 declare <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32, i32, <8 x i16>, <8 x i16>, <8 x i…
17 declare <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32, i32, <8 x half>, <8 x half>, <8 …
209   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
210 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 0, <8 x i16> %inactive, …
251   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
252 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 0, <8 x i16> %inactive, …
279   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
280 …%2 = call <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32 1, i32 0, <8 x half> %inactive…
321   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
322 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 1, <8 x i16> %inactive, …
363   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
364 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 1, <8 x i16> %inactive, …
391   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
392 …%2 = call <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32 1, i32 1, <8 x half> %inactive…
433   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
434 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 0, <8 x i16> undef, <8 x…
476   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
477 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 0, <8 x i16> undef, <8 x…
505   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
506 …%2 = call <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32 1, i32 0, <8 x half> undef, <8…
548   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
549 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 1, <8 x i16> undef, <8 x…
591   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
592 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 1, <8 x i16> undef, <8 x…
620   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
621 …%2 = call <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32 1, i32 1, <8 x half> undef, <8…
725   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
726 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 0, i32 0, <8 x i16> undef, <8 x…
768   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
769 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 0, i32 1, <8 x i16> undef, <8 x…
811   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
812 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 0, i32 0, <8 x i16> %inactive, …
853   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
854 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 0, i32 1, <8 x i16> %inactive, …