Lines Matching refs:v8i1

4 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
10 declare <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32, <8 x half>, <8 x half>, <8 x hal…
106   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
107 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 0, <8 x half> %inactive, <8 x …
134   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
135 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 1, <8 x half> %inactive, <8 x …
162   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
163 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 2, <8 x half> %inactive, <8 x …
190   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
191 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 3, <8 x half> %inactive, <8 x …
218   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
219 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 0, <8 x half> undef, <8 x half…
247   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
248 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 1, <8 x half> undef, <8 x half…
276   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
277 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 2, <8 x half> undef, <8 x half…
305   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
306 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 3, <8 x half> undef, <8 x half…