Lines Matching refs:v4i1

4 declare <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32)
17 declare <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32, <4 x float>, <4 x i32>,…
19 declare <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32, <4 x i32>, <4 x float>, i…
50   %1 = tail call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
64   %1 = tail call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
186   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
187 …%2 = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 0, <4 x float> %inact…
200   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
201 …%2 = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 1, <4 x float> %inact…
242   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
243 …%2 = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 0, <4 x i32> %inactive,…
256   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
257 …%2 = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 1, <4 x i32> %inactive,…
298   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
299 …%2 = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 0, <4 x float> undef,…
312   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
313 …%2 = call <4 x float> @llvm.arm.mve.vcvt.fix.predicated.v4f32.v4i32.v4i1(i32 1, <4 x float> undef,…
354   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
355 …%2 = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 0, <4 x i32> undef, <4 …
368   %1 = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
369 …%2 = call <4 x i32> @llvm.arm.mve.vcvt.fix.predicated.v4i32.v4f32.v4i1(i32 1, <4 x i32> undef, <4 …
402   %1 = tail call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)
416   %1 = tail call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 %0)