Lines Matching refs:v8i1

5 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
16 declare <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32, <8 x half>, <8 x i16>, i…
18 declare <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32, <8 x i16>, <8 x half>, i3…
158   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
159 …%2 = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 0, <8 x half> %inactiv…
172   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
173 …%2 = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 1, <8 x half> %inactiv…
214   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
215 …%2 = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> %inactive,…
228   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
229 …%2 = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 1, <8 x i16> %inactive,…
270   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
271 …%2 = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 0, <8 x half> undef, <…
284   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
285 …%2 = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 1, <8 x half> undef, <…
326   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
327 …%2 = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> undef, <8 …
340   %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
341 …%2 = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 1, <8 x i16> undef, <8 …