Lines Matching full:be
3 …one-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-BE
12 ; CHECK-BE-LABEL: masked_v4i32:
13 ; CHECK-BE: @ %bb.0: @ %entry
14 ; CHECK-BE-NEXT: vrev64.32 q1, q0
15 ; CHECK-BE-NEXT: vpt.s32 gt, q1, zr
16 ; CHECK-BE-NEXT: vstrwt.32 q1, [r0]
17 ; CHECK-BE-NEXT: bx lr
63 ; CHECK-BE-LABEL: masked_v4i32_align1:
64 ; CHECK-BE: @ %bb.0: @ %entry
65 ; CHECK-BE-NEXT: .pad #4
66 ; CHECK-BE-NEXT: sub sp, #4
67 ; CHECK-BE-NEXT: vrev64.32 q1, q0
68 ; CHECK-BE-NEXT: vcmp.s32 gt, q1, zr
69 ; CHECK-BE-NEXT: vmrs r2, p0
70 ; CHECK-BE-NEXT: and r1, r2, #1
71 ; CHECK-BE-NEXT: rsbs r3, r1, #0
72 ; CHECK-BE-NEXT: movs r1, #0
73 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1
74 ; CHECK-BE-NEXT: ubfx r3, r2, #4, #1
75 ; CHECK-BE-NEXT: rsbs r3, r3, #0
76 ; CHECK-BE-NEXT: bfi r1, r3, #1, #1
77 ; CHECK-BE-NEXT: ubfx r3, r2, #8, #1
78 ; CHECK-BE-NEXT: ubfx r2, r2, #12, #1
79 ; CHECK-BE-NEXT: rsbs r3, r3, #0
80 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1
81 ; CHECK-BE-NEXT: rsbs r2, r2, #0
82 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1
83 ; CHECK-BE-NEXT: lsls r2, r1, #31
84 ; CHECK-BE-NEXT: itt ne
85 ; CHECK-BE-NEXT: vmovne r2, s4
86 ; CHECK-BE-NEXT: strne r2, [r0]
87 ; CHECK-BE-NEXT: lsls r2, r1, #30
88 ; CHECK-BE-NEXT: itt mi
89 ; CHECK-BE-NEXT: vmovmi r2, s5
90 ; CHECK-BE-NEXT: strmi r2, [r0, #4]
91 ; CHECK-BE-NEXT: lsls r2, r1, #29
92 ; CHECK-BE-NEXT: itt mi
93 ; CHECK-BE-NEXT: vmovmi r2, s6
94 ; CHECK-BE-NEXT: strmi r2, [r0, #8]
95 ; CHECK-BE-NEXT: lsls r1, r1, #28
96 ; CHECK-BE-NEXT: itt mi
97 ; CHECK-BE-NEXT: vmovmi r1, s7
98 ; CHECK-BE-NEXT: strmi r1, [r0, #12]
99 ; CHECK-BE-NEXT: add sp, #4
100 ; CHECK-BE-NEXT: bx lr
117 ; CHECK-BE-LABEL: masked_v4i32_pre:
118 ; CHECK-BE: @ %bb.0: @ %entry
119 ; CHECK-BE-NEXT: vldr d1, [sp]
120 ; CHECK-BE-NEXT: vldrw.u32 q1, [r1]
121 ; CHECK-BE-NEXT: vmov d0, r3, r2
122 ; CHECK-BE-NEXT: vrev64.32 q2, q0
123 ; CHECK-BE-NEXT: vpt.s32 gt, q2, zr
124 ; CHECK-BE-NEXT: vstrwt.32 q1, [r0, #4]!
125 ; CHECK-BE-NEXT: bx lr
146 ; CHECK-BE-LABEL: masked_v4i32_post:
147 ; CHECK-BE: @ %bb.0: @ %entry
148 ; CHECK-BE-NEXT: vldr d1, [sp]
149 ; CHECK-BE-NEXT: vldrw.u32 q1, [r1]
150 ; CHECK-BE-NEXT: vmov d0, r3, r2
151 ; CHECK-BE-NEXT: vrev64.32 q2, q0
152 ; CHECK-BE-NEXT: vpt.s32 gt, q2, zr
153 ; CHECK-BE-NEXT: vstrwt.32 q1, [r0], #4
154 ; CHECK-BE-NEXT: bx lr
173 ; CHECK-BE-LABEL: masked_v8i16:
174 ; CHECK-BE: @ %bb.0: @ %entry
175 ; CHECK-BE-NEXT: vrev64.16 q1, q0
176 ; CHECK-BE-NEXT: vpt.s16 gt, q1, zr
177 ; CHECK-BE-NEXT: vstrht.16 q1, [r0]
178 ; CHECK-BE-NEXT: bx lr
253 ; CHECK-BE-LABEL: masked_v8i16_align1:
254 ; CHECK-BE: @ %bb.0: @ %entry
255 ; CHECK-BE-NEXT: .pad #8
256 ; CHECK-BE-NEXT: sub sp, #8
257 ; CHECK-BE-NEXT: vrev64.16 q1, q0
258 ; CHECK-BE-NEXT: vcmp.s16 gt, q1, zr
259 ; CHECK-BE-NEXT: vmrs r1, p0
260 ; CHECK-BE-NEXT: and r2, r1, #1
261 ; CHECK-BE-NEXT: rsbs r3, r2, #0
262 ; CHECK-BE-NEXT: movs r2, #0
263 ; CHECK-BE-NEXT: bfi r2, r3, #0, #1
264 ; CHECK-BE-NEXT: ubfx r3, r1, #2, #1
265 ; CHECK-BE-NEXT: rsbs r3, r3, #0
266 ; CHECK-BE-NEXT: bfi r2, r3, #1, #1
267 ; CHECK-BE-NEXT: ubfx r3, r1, #4, #1
268 ; CHECK-BE-NEXT: rsbs r3, r3, #0
269 ; CHECK-BE-NEXT: bfi r2, r3, #2, #1
270 ; CHECK-BE-NEXT: ubfx r3, r1, #6, #1
271 ; CHECK-BE-NEXT: rsbs r3, r3, #0
272 ; CHECK-BE-NEXT: bfi r2, r3, #3, #1
273 ; CHECK-BE-NEXT: ubfx r3, r1, #8, #1
274 ; CHECK-BE-NEXT: rsbs r3, r3, #0
275 ; CHECK-BE-NEXT: bfi r2, r3, #4, #1
276 ; CHECK-BE-NEXT: ubfx r3, r1, #10, #1
277 ; CHECK-BE-NEXT: rsbs r3, r3, #0
278 ; CHECK-BE-NEXT: bfi r2, r3, #5, #1
279 ; CHECK-BE-NEXT: ubfx r3, r1, #12, #1
280 ; CHECK-BE-NEXT: ubfx r1, r1, #14, #1
281 ; CHECK-BE-NEXT: rsbs r3, r3, #0
282 ; CHECK-BE-NEXT: bfi r2, r3, #6, #1
283 ; CHECK-BE-NEXT: rsbs r1, r1, #0
284 ; CHECK-BE-NEXT: bfi r2, r1, #7, #1
285 ; CHECK-BE-NEXT: uxtb r1, r2
286 ; CHECK-BE-NEXT: lsls r2, r2, #31
287 ; CHECK-BE-NEXT: itt ne
288 ; CHECK-BE-NEXT: vmovne.u16 r2, q1[0]
289 ; CHECK-BE-NEXT: strhne r2, [r0]
290 ; CHECK-BE-NEXT: lsls r2, r1, #30
291 ; CHECK-BE-NEXT: itt mi
292 ; CHECK-BE-NEXT: vmovmi.u16 r2, q1[1]
293 ; CHECK-BE-NEXT: strhmi r2, [r0, #2]
294 ; CHECK-BE-NEXT: lsls r2, r1, #29
295 ; CHECK-BE-NEXT: itt mi
296 ; CHECK-BE-NEXT: vmovmi.u16 r2, q1[2]
297 ; CHECK-BE-NEXT: strhmi r2, [r0, #4]
298 ; CHECK-BE-NEXT: lsls r2, r1, #28
299 ; CHECK-BE-NEXT: itt mi
300 ; CHECK-BE-NEXT: vmovmi.u16 r2, q1[3]
301 ; CHECK-BE-NEXT: strhmi r2, [r0, #6]
302 ; CHECK-BE-NEXT: lsls r2, r1, #27
303 ; CHECK-BE-NEXT: itt mi
304 ; CHECK-BE-NEXT: vmovmi.u16 r2, q1[4]
305 ; CHECK-BE-NEXT: strhmi r2, [r0, #8]
306 ; CHECK-BE-NEXT: lsls r2, r1, #26
307 ; CHECK-BE-NEXT: itt mi
308 ; CHECK-BE-NEXT: vmovmi.u16 r2, q1[5]
309 ; CHECK-BE-NEXT: strhmi r2, [r0, #10]
310 ; CHECK-BE-NEXT: lsls r2, r1, #25
311 ; CHECK-BE-NEXT: itt mi
312 ; CHECK-BE-NEXT: vmovmi.u16 r2, q1[6]
313 ; CHECK-BE-NEXT: strhmi r2, [r0, #12]
314 ; CHECK-BE-NEXT: lsls r1, r1, #24
315 ; CHECK-BE-NEXT: itt mi
316 ; CHECK-BE-NEXT: vmovmi.u16 r1, q1[7]
317 ; CHECK-BE-NEXT: strhmi r1, [r0, #14]
318 ; CHECK-BE-NEXT: add sp, #8
319 ; CHECK-BE-NEXT: bx lr
336 ; CHECK-BE-LABEL: masked_v8i16_pre:
337 ; CHECK-BE: @ %bb.0: @ %entry
338 ; CHECK-BE-NEXT: vldr d1, [sp]
339 ; CHECK-BE-NEXT: vldrh.u16 q1, [r1]
340 ; CHECK-BE-NEXT: vmov d0, r3, r2
341 ; CHECK-BE-NEXT: vrev64.16 q2, q0
342 ; CHECK-BE-NEXT: vpt.s16 gt, q2, zr
343 ; CHECK-BE-NEXT: vstrht.16 q1, [r0, #4]!
344 ; CHECK-BE-NEXT: bx lr
365 ; CHECK-BE-LABEL: masked_v8i16_post:
366 ; CHECK-BE: @ %bb.0: @ %entry
367 ; CHECK-BE-NEXT: vldr d1, [sp]
368 ; CHECK-BE-NEXT: vldrh.u16 q1, [r1]
369 ; CHECK-BE-NEXT: vmov d0, r3, r2
370 ; CHECK-BE-NEXT: vrev64.16 q2, q0
371 ; CHECK-BE-NEXT: vpt.s16 gt, q2, zr
372 ; CHECK-BE-NEXT: vstrht.16 q1, [r0], #4
373 ; CHECK-BE-NEXT: bx lr
392 ; CHECK-BE-LABEL: masked_v16i8:
393 ; CHECK-BE: @ %bb.0: @ %entry
394 ; CHECK-BE-NEXT: vrev64.8 q1, q0
395 ; CHECK-BE-NEXT: vpt.s8 gt, q1, zr
396 ; CHECK-BE-NEXT: vstrbt.8 q1, [r0]
397 ; CHECK-BE-NEXT: bx lr
414 ; CHECK-BE-LABEL: masked_v16i8_pre:
415 ; CHECK-BE: @ %bb.0: @ %entry
416 ; CHECK-BE-NEXT: vldr d1, [sp]
417 ; CHECK-BE-NEXT: vldrb.u8 q1, [r1]
418 ; CHECK-BE-NEXT: vmov d0, r3, r2
419 ; CHECK-BE-NEXT: vrev64.8 q2, q0
420 ; CHECK-BE-NEXT: vpt.s8 gt, q2, zr
421 ; CHECK-BE-NEXT: vstrbt.8 q1, [r0, #4]!
422 ; CHECK-BE-NEXT: bx lr
443 ; CHECK-BE-LABEL: masked_v16i8_post:
444 ; CHECK-BE: @ %bb.0: @ %entry
445 ; CHECK-BE-NEXT: vldr d1, [sp]
446 ; CHECK-BE-NEXT: vldrb.u8 q1, [r1]
447 ; CHECK-BE-NEXT: vmov d0, r3, r2
448 ; CHECK-BE-NEXT: vrev64.8 q2, q0
449 ; CHECK-BE-NEXT: vpt.s8 gt, q2, zr
450 ; CHECK-BE-NEXT: vstrbt.8 q1, [r0], #4
451 ; CHECK-BE-NEXT: bx lr
470 ; CHECK-BE-LABEL: masked_v4f32:
471 ; CHECK-BE: @ %bb.0: @ %entry
472 ; CHECK-BE-NEXT: vrev64.32 q2, q1
473 ; CHECK-BE-NEXT: vrev64.32 q1, q0
474 ; CHECK-BE-NEXT: vpt.i32 ne, q2, zr
475 ; CHECK-BE-NEXT: vstrwt.32 q1, [r0]
476 ; CHECK-BE-NEXT: bx lr
522 ; CHECK-BE-LABEL: masked_v4f32_align1:
523 ; CHECK-BE: @ %bb.0: @ %entry
524 ; CHECK-BE-NEXT: .pad #4
525 ; CHECK-BE-NEXT: sub sp, #4
526 ; CHECK-BE-NEXT: vrev64.32 q2, q1
527 ; CHECK-BE-NEXT: movs r1, #0
528 ; CHECK-BE-NEXT: vcmp.i32 ne, q2, zr
529 ; CHECK-BE-NEXT: vrev64.32 q1, q0
530 ; CHECK-BE-NEXT: vmrs r2, p0
531 ; CHECK-BE-NEXT: and r3, r2, #1
532 ; CHECK-BE-NEXT: rsbs r3, r3, #0
533 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1
534 ; CHECK-BE-NEXT: ubfx r3, r2, #4, #1
535 ; CHECK-BE-NEXT: rsbs r3, r3, #0
536 ; CHECK-BE-NEXT: bfi r1, r3, #1, #1
537 ; CHECK-BE-NEXT: ubfx r3, r2, #8, #1
538 ; CHECK-BE-NEXT: ubfx r2, r2, #12, #1
539 ; CHECK-BE-NEXT: rsbs r3, r3, #0
540 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1
541 ; CHECK-BE-NEXT: rsbs r2, r2, #0
542 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1
543 ; CHECK-BE-NEXT: lsls r2, r1, #31
544 ; CHECK-BE-NEXT: itt ne
545 ; CHECK-BE-NEXT: vmovne r2, s4
546 ; CHECK-BE-NEXT: strne r2, [r0]
547 ; CHECK-BE-NEXT: lsls r2, r1, #30
548 ; CHECK-BE-NEXT: itt mi
549 ; CHECK-BE-NEXT: vmovmi r2, s5
550 ; CHECK-BE-NEXT: strmi r2, [r0, #4]
551 ; CHECK-BE-NEXT: lsls r2, r1, #29
552 ; CHECK-BE-NEXT: itt mi
553 ; CHECK-BE-NEXT: vmovmi r2, s6
554 ; CHECK-BE-NEXT: strmi r2, [r0, #8]
555 ; CHECK-BE-NEXT: lsls r1, r1, #28
556 ; CHECK-BE-NEXT: itt mi
557 ; CHECK-BE-NEXT: vmovmi r1, s7
558 ; CHECK-BE-NEXT: strmi r1, [r0, #12]
559 ; CHECK-BE-NEXT: add sp, #4
560 ; CHECK-BE-NEXT: bx lr
577 ; CHECK-BE-LABEL: masked_v4f32_pre:
578 ; CHECK-BE: @ %bb.0: @ %entry
579 ; CHECK-BE-NEXT: vldr d1, [sp]
580 ; CHECK-BE-NEXT: vldrw.u32 q1, [r1]
581 ; CHECK-BE-NEXT: vmov d0, r3, r2
582 ; CHECK-BE-NEXT: vrev64.32 q2, q0
583 ; CHECK-BE-NEXT: vpt.s32 gt, q2, zr
584 ; CHECK-BE-NEXT: vstrwt.32 q1, [r0, #4]!
585 ; CHECK-BE-NEXT: bx lr
606 ; CHECK-BE-LABEL: masked_v4f32_post:
607 ; CHECK-BE: @ %bb.0: @ %entry
608 ; CHECK-BE-NEXT: vldr d1, [sp]
609 ; CHECK-BE-NEXT: vldrw.u32 q1, [r1]
610 ; CHECK-BE-NEXT: vmov d0, r3, r2
611 ; CHECK-BE-NEXT: vrev64.32 q2, q0
612 ; CHECK-BE-NEXT: vpt.s32 gt, q2, zr
613 ; CHECK-BE-NEXT: vstrwt.32 q1, [r0], #4
614 ; CHECK-BE-NEXT: bx lr
633 ; CHECK-BE-LABEL: masked_v8f16:
634 ; CHECK-BE: @ %bb.0: @ %entry
635 ; CHECK-BE-NEXT: vrev64.16 q2, q1
636 ; CHECK-BE-NEXT: vrev64.16 q1, q0
637 ; CHECK-BE-NEXT: vpt.i16 ne, q2, zr
638 ; CHECK-BE-NEXT: vstrht.16 q1, [r0]
639 ; CHECK-BE-NEXT: bx lr
758 ; CHECK-BE-LABEL: masked_v8f16_align1:
759 ; CHECK-BE: @ %bb.0: @ %entry
760 ; CHECK-BE-NEXT: .pad #40
761 ; CHECK-BE-NEXT: sub sp, #40
762 ; CHECK-BE-NEXT: vrev64.16 q2, q1
763 ; CHECK-BE-NEXT: vrev64.16 q1, q0
764 ; CHECK-BE-NEXT: vcmp.i16 ne, q2, zr
765 ; CHECK-BE-NEXT: vmrs r1, p0
766 ; CHECK-BE-NEXT: and r2, r1, #1
767 ; CHECK-BE-NEXT: rsbs r3, r2, #0
768 ; CHECK-BE-NEXT: movs r2, #0
769 ; CHECK-BE-NEXT: bfi r2, r3, #0, #1
770 ; CHECK-BE-NEXT: ubfx r3, r1, #2, #1
771 ; CHECK-BE-NEXT: rsbs r3, r3, #0
772 ; CHECK-BE-NEXT: bfi r2, r3, #1, #1
773 ; CHECK-BE-NEXT: ubfx r3, r1, #4, #1
774 ; CHECK-BE-NEXT: rsbs r3, r3, #0
775 ; CHECK-BE-NEXT: bfi r2, r3, #2, #1
776 ; CHECK-BE-NEXT: ubfx r3, r1, #6, #1
777 ; CHECK-BE-NEXT: rsbs r3, r3, #0
778 ; CHECK-BE-NEXT: bfi r2, r3, #3, #1
779 ; CHECK-BE-NEXT: ubfx r3, r1, #8, #1
780 ; CHECK-BE-NEXT: rsbs r3, r3, #0
781 ; CHECK-BE-NEXT: bfi r2, r3, #4, #1
782 ; CHECK-BE-NEXT: ubfx r3, r1, #10, #1
783 ; CHECK-BE-NEXT: rsbs r3, r3, #0
784 ; CHECK-BE-NEXT: bfi r2, r3, #5, #1
785 ; CHECK-BE-NEXT: ubfx r3, r1, #12, #1
786 ; CHECK-BE-NEXT: ubfx r1, r1, #14, #1
787 ; CHECK-BE-NEXT: rsbs r3, r3, #0
788 ; CHECK-BE-NEXT: bfi r2, r3, #6, #1
789 ; CHECK-BE-NEXT: rsbs r1, r1, #0
790 ; CHECK-BE-NEXT: bfi r2, r1, #7, #1
791 ; CHECK-BE-NEXT: uxtb r1, r2
792 ; CHECK-BE-NEXT: lsls r2, r2, #31
793 ; CHECK-BE-NEXT: bne .LBB16_9
794 ; CHECK-BE-NEXT: @ %bb.1: @ %else
795 ; CHECK-BE-NEXT: lsls r2, r1, #30
796 ; CHECK-BE-NEXT: bmi .LBB16_10
797 ; CHECK-BE-NEXT: .LBB16_2: @ %else2
798 ; CHECK-BE-NEXT: lsls r2, r1, #29
799 ; CHECK-BE-NEXT: bmi .LBB16_11
800 ; CHECK-BE-NEXT: .LBB16_3: @ %else4
801 ; CHECK-BE-NEXT: lsls r2, r1, #28
802 ; CHECK-BE-NEXT: bmi .LBB16_12
803 ; CHECK-BE-NEXT: .LBB16_4: @ %else6
804 ; CHECK-BE-NEXT: lsls r2, r1, #27
805 ; CHECK-BE-NEXT: bmi .LBB16_13
806 ; CHECK-BE-NEXT: .LBB16_5: @ %else8
807 ; CHECK-BE-NEXT: lsls r2, r1, #26
808 ; CHECK-BE-NEXT: bmi .LBB16_14
809 ; CHECK-BE-NEXT: .LBB16_6: @ %else10
810 ; CHECK-BE-NEXT: lsls r2, r1, #25
811 ; CHECK-BE-NEXT: bmi .LBB16_15
812 ; CHECK-BE-NEXT: .LBB16_7: @ %else12
813 ; CHECK-BE-NEXT: lsls r1, r1, #24
814 ; CHECK-BE-NEXT: bmi .LBB16_16
815 ; CHECK-BE-NEXT: .LBB16_8: @ %else14
816 ; CHECK-BE-NEXT: add sp, #40
817 ; CHECK-BE-NEXT: bx lr
818 ; CHECK-BE-NEXT: .LBB16_9: @ %cond.store
819 ; CHECK-BE-NEXT: vstr.16 s4, [sp, #28]
820 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #28]
821 ; CHECK-BE-NEXT: strh r2, [r0]
822 ; CHECK-BE-NEXT: lsls r2, r1, #30
823 ; CHECK-BE-NEXT: bpl .LBB16_2
824 ; CHECK-BE-NEXT: .LBB16_10: @ %cond.store1
825 ; CHECK-BE-NEXT: vmovx.f16 s0, s4
826 ; CHECK-BE-NEXT: vstr.16 s0, [sp, #24]
827 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #24]
828 ; CHECK-BE-NEXT: strh r2, [r0, #2]
829 ; CHECK-BE-NEXT: lsls r2, r1, #29
830 ; CHECK-BE-NEXT: bpl .LBB16_3
831 ; CHECK-BE-NEXT: .LBB16_11: @ %cond.store3
832 ; CHECK-BE-NEXT: vstr.16 s5, [sp, #20]
833 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #20]
834 ; CHECK-BE-NEXT: strh r2, [r0, #4]
835 ; CHECK-BE-NEXT: lsls r2, r1, #28
836 ; CHECK-BE-NEXT: bpl .LBB16_4
837 ; CHECK-BE-NEXT: .LBB16_12: @ %cond.store5
838 ; CHECK-BE-NEXT: vmovx.f16 s0, s5
839 ; CHECK-BE-NEXT: vstr.16 s0, [sp, #16]
840 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #16]
841 ; CHECK-BE-NEXT: strh r2, [r0, #6]
842 ; CHECK-BE-NEXT: lsls r2, r1, #27
843 ; CHECK-BE-NEXT: bpl .LBB16_5
844 ; CHECK-BE-NEXT: .LBB16_13: @ %cond.store7
845 ; CHECK-BE-NEXT: vstr.16 s6, [sp, #12]
846 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #12]
847 ; CHECK-BE-NEXT: strh r2, [r0, #8]
848 ; CHECK-BE-NEXT: lsls r2, r1, #26
849 ; CHECK-BE-NEXT: bpl .LBB16_6
850 ; CHECK-BE-NEXT: .LBB16_14: @ %cond.store9
851 ; CHECK-BE-NEXT: vmovx.f16 s0, s6
852 ; CHECK-BE-NEXT: vstr.16 s0, [sp, #8]
853 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #8]
854 ; CHECK-BE-NEXT: strh r2, [r0, #10]
855 ; CHECK-BE-NEXT: lsls r2, r1, #25
856 ; CHECK-BE-NEXT: bpl .LBB16_7
857 ; CHECK-BE-NEXT: .LBB16_15: @ %cond.store11
858 ; CHECK-BE-NEXT: vstr.16 s7, [sp, #4]
859 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #4]
860 ; CHECK-BE-NEXT: strh r2, [r0, #12]
861 ; CHECK-BE-NEXT: lsls r1, r1, #24
862 ; CHECK-BE-NEXT: bpl .LBB16_8
863 ; CHECK-BE-NEXT: .LBB16_16: @ %cond.store13
864 ; CHECK-BE-NEXT: vmovx.f16 s0, s7
865 ; CHECK-BE-NEXT: vstr.16 s0, [sp]
866 ; CHECK-BE-NEXT: ldrh.w r1, [sp]
867 ; CHECK-BE-NEXT: strh r1, [r0, #14]
868 ; CHECK-BE-NEXT: add sp, #40
869 ; CHECK-BE-NEXT: bx lr
886 ; CHECK-BE-LABEL: masked_v8f16_pre:
887 ; CHECK-BE: @ %bb.0: @ %entry
888 ; CHECK-BE-NEXT: vldr d1, [sp]
889 ; CHECK-BE-NEXT: vldrh.u16 q1, [r1]
890 ; CHECK-BE-NEXT: vmov d0, r3, r2
891 ; CHECK-BE-NEXT: vrev64.16 q2, q0
892 ; CHECK-BE-NEXT: vpt.s16 gt, q2, zr
893 ; CHECK-BE-NEXT: vstrht.16 q1, [r0, #4]!
894 ; CHECK-BE-NEXT: bx lr
915 ; CHECK-BE-LABEL: masked_v8f16_post:
916 ; CHECK-BE: @ %bb.0: @ %entry
917 ; CHECK-BE-NEXT: vldr d1, [sp]
918 ; CHECK-BE-NEXT: vldrh.u16 q1, [r1]
919 ; CHECK-BE-NEXT: vmov d0, r3, r2
920 ; CHECK-BE-NEXT: vrev64.16 q2, q0
921 ; CHECK-BE-NEXT: vpt.s16 gt, q2, zr
922 ; CHECK-BE-NEXT: vstrht.16 q1, [r0], #4
923 ; CHECK-BE-NEXT: bx lr
968 ; CHECK-BE-LABEL: masked_v2i64:
969 ; CHECK-BE: @ %bb.0: @ %entry
970 ; CHECK-BE-NEXT: .pad #4
971 ; CHECK-BE-NEXT: sub sp, #4
972 ; CHECK-BE-NEXT: vrev64.32 q1, q0
973 ; CHECK-BE-NEXT: movs r3, #0
974 ; CHECK-BE-NEXT: vmov r2, s7
975 ; CHECK-BE-NEXT: vmov r1, s6
976 ; CHECK-BE-NEXT: vmov r12, s4
977 ; CHECK-BE-NEXT: rsbs r2, r2, #0
978 ; CHECK-BE-NEXT: vmov r2, s5
979 ; CHECK-BE-NEXT: sbcs.w r1, r3, r1
980 ; CHECK-BE-NEXT: mov.w r1, #0
981 ; CHECK-BE-NEXT: it lt
982 ; CHECK-BE-NEXT: movlt r1, #1
983 ; CHECK-BE-NEXT: rsbs r2, r2, #0
984 ; CHECK-BE-NEXT: sbcs.w r2, r3, r12
985 ; CHECK-BE-NEXT: it lt
986 ; CHECK-BE-NEXT: movlt r3, #1
987 ; CHECK-BE-NEXT: cmp r3, #0
988 ; CHECK-BE-NEXT: it ne
989 ; CHECK-BE-NEXT: mvnne r3, #1
990 ; CHECK-BE-NEXT: bfi r3, r1, #0, #1
991 ; CHECK-BE-NEXT: and r1, r3, #3
992 ; CHECK-BE-NEXT: lsls r2, r3, #31
993 ; CHECK-BE-NEXT: it ne
994 ; CHECK-BE-NEXT: vstrne d0, [r0]
995 ; CHECK-BE-NEXT: lsls r1, r1, #30
996 ; CHECK-BE-NEXT: it mi
997 ; CHECK-BE-NEXT: vstrmi d1, [r0, #8]
998 ; CHECK-BE-NEXT: add sp, #4
999 ; CHECK-BE-NEXT: bx lr
1039 ; CHECK-BE-LABEL: masked_v2f64:
1040 ; CHECK-BE: @ %bb.0: @ %entry
1041 ; CHECK-BE-NEXT: .pad #4
1042 ; CHECK-BE-NEXT: sub sp, #4
1043 ; CHECK-BE-NEXT: vrev64.32 q2, q1
1044 ; CHECK-BE-NEXT: movs r3, #0
1045 ; CHECK-BE-NEXT: vmov r2, s11
1046 ; CHECK-BE-NEXT: vmov r1, s10
1047 ; CHECK-BE-NEXT: vmov r12, s8
1048 ; CHECK-BE-NEXT: rsbs r2, r2, #0
1049 ; CHECK-BE-NEXT: vmov r2, s9
1050 ; CHECK-BE-NEXT: sbcs.w r1, r3, r1
1051 ; CHECK-BE-NEXT: mov.w r1, #0
1052 ; CHECK-BE-NEXT: it lt
1053 ; CHECK-BE-NEXT: movlt r1, #1
1054 ; CHECK-BE-NEXT: rsbs r2, r2, #0
1055 ; CHECK-BE-NEXT: sbcs.w r2, r3, r12
1056 ; CHECK-BE-NEXT: it lt
1057 ; CHECK-BE-NEXT: movlt r3, #1
1058 ; CHECK-BE-NEXT: cmp r3, #0
1059 ; CHECK-BE-NEXT: it ne
1060 ; CHECK-BE-NEXT: mvnne r3, #1
1061 ; CHECK-BE-NEXT: bfi r3, r1, #0, #1
1062 ; CHECK-BE-NEXT: and r1, r3, #3
1063 ; CHECK-BE-NEXT: lsls r2, r3, #31
1064 ; CHECK-BE-NEXT: it ne
1065 ; CHECK-BE-NEXT: vstrne d0, [r0]
1066 ; CHECK-BE-NEXT: lsls r1, r1, #30
1067 ; CHECK-BE-NEXT: it mi
1068 ; CHECK-BE-NEXT: vstrmi d1, [r0, #8]
1069 ; CHECK-BE-NEXT: add sp, #4
1070 ; CHECK-BE-NEXT: bx lr
1084 ; CHECK-BE-LABEL: masked_v4i16:
1085 ; CHECK-BE: @ %bb.0: @ %entry
1086 ; CHECK-BE-NEXT: vrev64.32 q1, q0
1087 ; CHECK-BE-NEXT: vpt.s32 gt, q1, zr
1088 ; CHECK-BE-NEXT: vstrht.32 q1, [r0]
1089 ; CHECK-BE-NEXT: bx lr
1104 ; CHECK-BE-LABEL: masked_v4i8:
1105 ; CHECK-BE: @ %bb.0: @ %entry
1106 ; CHECK-BE-NEXT: vrev64.32 q1, q0
1107 ; CHECK-BE-NEXT: vpt.s32 gt, q1, zr
1108 ; CHECK-BE-NEXT: vstrbt.32 q1, [r0]
1109 ; CHECK-BE-NEXT: bx lr
1124 ; CHECK-BE-LABEL: masked_v8i8:
1125 ; CHECK-BE: @ %bb.0: @ %entry
1126 ; CHECK-BE-NEXT: vrev64.16 q1, q0
1127 ; CHECK-BE-NEXT: vpt.s16 gt, q1, zr
1128 ; CHECK-BE-NEXT: vstrbt.16 q1, [r0]
1129 ; CHECK-BE-NEXT: bx lr
1176 ; CHECK-BE-LABEL: masked_v4i16_align1:
1177 ; CHECK-BE: @ %bb.0: @ %entry
1178 ; CHECK-BE-NEXT: .pad #4
1179 ; CHECK-BE-NEXT: sub sp, #4
1180 ; CHECK-BE-NEXT: vrev64.32 q1, q0
1181 ; CHECK-BE-NEXT: vcmp.s32 gt, q1, zr
1182 ; CHECK-BE-NEXT: vmrs r2, p0
1183 ; CHECK-BE-NEXT: and r1, r2, #1
1184 ; CHECK-BE-NEXT: rsbs r3, r1, #0
1185 ; CHECK-BE-NEXT: movs r1, #0
1186 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1
1187 ; CHECK-BE-NEXT: ubfx r3, r2, #4, #1
1188 ; CHECK-BE-NEXT: rsbs r3, r3, #0
1189 ; CHECK-BE-NEXT: bfi r1, r3, #1, #1
1190 ; CHECK-BE-NEXT: ubfx r3, r2, #8, #1
1191 ; CHECK-BE-NEXT: ubfx r2, r2, #12, #1
1192 ; CHECK-BE-NEXT: rsbs r3, r3, #0
1193 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1
1194 ; CHECK-BE-NEXT: rsbs r2, r2, #0
1195 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1
1196 ; CHECK-BE-NEXT: lsls r2, r1, #31
1197 ; CHECK-BE-NEXT: itt ne
1198 ; CHECK-BE-NEXT: vmovne r2, s4
1199 ; CHECK-BE-NEXT: strhne r2, [r0]
1200 ; CHECK-BE-NEXT: lsls r2, r1, #30
1201 ; CHECK-BE-NEXT: itt mi
1202 ; CHECK-BE-NEXT: vmovmi r2, s5
1203 ; CHECK-BE-NEXT: strhmi r2, [r0, #2]
1204 ; CHECK-BE-NEXT: lsls r2, r1, #29
1205 ; CHECK-BE-NEXT: itt mi
1206 ; CHECK-BE-NEXT: vmovmi r2, s6
1207 ; CHECK-BE-NEXT: strhmi r2, [r0, #4]
1208 ; CHECK-BE-NEXT: lsls r1, r1, #28
1209 ; CHECK-BE-NEXT: itt mi
1210 ; CHECK-BE-NEXT: vmovmi r1, s7
1211 ; CHECK-BE-NEXT: strhmi r1, [r0, #6]
1212 ; CHECK-BE-NEXT: add sp, #4
1213 ; CHECK-BE-NEXT: bx lr
1304 ; CHECK-BE-LABEL: masked_v4f16_align4:
1305 ; CHECK-BE: @ %bb.0: @ %entry
1306 ; CHECK-BE-NEXT: .pad #4
1307 ; CHECK-BE-NEXT: sub sp, #4
1308 ; CHECK-BE-NEXT: vrev64.32 q1, q0
1309 ; CHECK-BE-NEXT: movs r1, #0
1310 ; CHECK-BE-NEXT: vcmp.f32 s4, #0
1311 ; CHECK-BE-NEXT: movs r2, #0
1312 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1313 ; CHECK-BE-NEXT: it gt
1314 ; CHECK-BE-NEXT: movgt r1, #1
1315 ; CHECK-BE-NEXT: cmp r1, #0
1316 ; CHECK-BE-NEXT: vcmp.f32 s5, #0
1317 ; CHECK-BE-NEXT: cset r1, ne
1318 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1319 ; CHECK-BE-NEXT: and r1, r1, #1
1320 ; CHECK-BE-NEXT: vcmp.f32 s6, #0
1321 ; CHECK-BE-NEXT: rsb.w r3, r1, #0
1322 ; CHECK-BE-NEXT: mov.w r1, #0
1323 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1
1324 ; CHECK-BE-NEXT: mov.w r3, #0
1325 ; CHECK-BE-NEXT: it gt
1326 ; CHECK-BE-NEXT: movgt r3, #1
1327 ; CHECK-BE-NEXT: cmp r3, #0
1328 ; CHECK-BE-NEXT: cset r3, ne
1329 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1330 ; CHECK-BE-NEXT: and r3, r3, #1
1331 ; CHECK-BE-NEXT: vcmp.f32 s7, #0
1332 ; CHECK-BE-NEXT: rsb.w r3, r3, #0
1333 ; CHECK-BE-NEXT: vcvtb.f16.f32 s0, s4
1334 ; CHECK-BE-NEXT: bfi r1, r3, #1, #1
1335 ; CHECK-BE-NEXT: mov.w r3, #0
1336 ; CHECK-BE-NEXT: it gt
1337 ; CHECK-BE-NEXT: movgt r3, #1
1338 ; CHECK-BE-NEXT: cmp r3, #0
1339 ; CHECK-BE-NEXT: cset r3, ne
1340 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1341 ; CHECK-BE-NEXT: it gt
1342 ; CHECK-BE-NEXT: movgt r2, #1
1343 ; CHECK-BE-NEXT: cmp r2, #0
1344 ; CHECK-BE-NEXT: and r3, r3, #1
1345 ; CHECK-BE-NEXT: cset r2, ne
1346 ; CHECK-BE-NEXT: and r2, r2, #1
1347 ; CHECK-BE-NEXT: rsbs r3, r3, #0
1348 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1
1349 ; CHECK-BE-NEXT: rsbs r2, r2, #0
1350 ; CHECK-BE-NEXT: vcvtt.f16.f32 s0, s5
1351 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1
1352 ; CHECK-BE-NEXT: vcvtb.f16.f32 s1, s6
1353 ; CHECK-BE-NEXT: vcvtt.f16.f32 s1, s7
1354 ; CHECK-BE-NEXT: lsls r2, r1, #31
1355 ; CHECK-BE-NEXT: bne .LBB25_5
1356 ; CHECK-BE-NEXT: @ %bb.1: @ %else
1357 ; CHECK-BE-NEXT: lsls r2, r1, #30
1358 ; CHECK-BE-NEXT: bmi .LBB25_6
1359 ; CHECK-BE-NEXT: .LBB25_2: @ %else2
1360 ; CHECK-BE-NEXT: lsls r2, r1, #29
1361 ; CHECK-BE-NEXT: bmi .LBB25_7
1362 ; CHECK-BE-NEXT: .LBB25_3: @ %else4
1363 ; CHECK-BE-NEXT: lsls r1, r1, #28
1364 ; CHECK-BE-NEXT: bmi .LBB25_8
1365 ; CHECK-BE-NEXT: .LBB25_4: @ %else6
1366 ; CHECK-BE-NEXT: add sp, #4
1367 ; CHECK-BE-NEXT: bx lr
1368 ; CHECK-BE-NEXT: .LBB25_5: @ %cond.store
1369 ; CHECK-BE-NEXT: vstr.16 s0, [r0]
1370 ; CHECK-BE-NEXT: lsls r2, r1, #30
1371 ; CHECK-BE-NEXT: bpl .LBB25_2
1372 ; CHECK-BE-NEXT: .LBB25_6: @ %cond.store1
1373 ; CHECK-BE-NEXT: vmovx.f16 s4, s0
1374 ; CHECK-BE-NEXT: vstr.16 s4, [r0, #2]
1375 ; CHECK-BE-NEXT: lsls r2, r1, #29
1376 ; CHECK-BE-NEXT: bpl .LBB25_3
1377 ; CHECK-BE-NEXT: .LBB25_7: @ %cond.store3
1378 ; CHECK-BE-NEXT: vstr.16 s1, [r0, #4]
1379 ; CHECK-BE-NEXT: lsls r1, r1, #28
1380 ; CHECK-BE-NEXT: bpl .LBB25_4
1381 ; CHECK-BE-NEXT: .LBB25_8: @ %cond.store5
1382 ; CHECK-BE-NEXT: vmovx.f16 s0, s1
1383 ; CHECK-BE-NEXT: vstr.16 s0, [r0, #6]
1384 ; CHECK-BE-NEXT: add sp, #4
1385 ; CHECK-BE-NEXT: bx lr
1476 ; CHECK-BE-LABEL: masked_v4f16_align2:
1477 ; CHECK-BE: @ %bb.0: @ %entry
1478 ; CHECK-BE-NEXT: .pad #4
1479 ; CHECK-BE-NEXT: sub sp, #4
1480 ; CHECK-BE-NEXT: vrev64.32 q1, q0
1481 ; CHECK-BE-NEXT: movs r1, #0
1482 ; CHECK-BE-NEXT: vcmp.f32 s4, #0
1483 ; CHECK-BE-NEXT: movs r2, #0
1484 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1485 ; CHECK-BE-NEXT: it gt
1486 ; CHECK-BE-NEXT: movgt r1, #1
1487 ; CHECK-BE-NEXT: cmp r1, #0
1488 ; CHECK-BE-NEXT: vcmp.f32 s5, #0
1489 ; CHECK-BE-NEXT: cset r1, ne
1490 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1491 ; CHECK-BE-NEXT: and r1, r1, #1
1492 ; CHECK-BE-NEXT: vcmp.f32 s6, #0
1493 ; CHECK-BE-NEXT: rsb.w r3, r1, #0
1494 ; CHECK-BE-NEXT: mov.w r1, #0
1495 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1
1496 ; CHECK-BE-NEXT: mov.w r3, #0
1497 ; CHECK-BE-NEXT: it gt
1498 ; CHECK-BE-NEXT: movgt r3, #1
1499 ; CHECK-BE-NEXT: cmp r3, #0
1500 ; CHECK-BE-NEXT: cset r3, ne
1501 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1502 ; CHECK-BE-NEXT: and r3, r3, #1
1503 ; CHECK-BE-NEXT: vcmp.f32 s7, #0
1504 ; CHECK-BE-NEXT: rsb.w r3, r3, #0
1505 ; CHECK-BE-NEXT: vcvtb.f16.f32 s0, s4
1506 ; CHECK-BE-NEXT: bfi r1, r3, #1, #1
1507 ; CHECK-BE-NEXT: mov.w r3, #0
1508 ; CHECK-BE-NEXT: it gt
1509 ; CHECK-BE-NEXT: movgt r3, #1
1510 ; CHECK-BE-NEXT: cmp r3, #0
1511 ; CHECK-BE-NEXT: cset r3, ne
1512 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1513 ; CHECK-BE-NEXT: it gt
1514 ; CHECK-BE-NEXT: movgt r2, #1
1515 ; CHECK-BE-NEXT: cmp r2, #0
1516 ; CHECK-BE-NEXT: and r3, r3, #1
1517 ; CHECK-BE-NEXT: cset r2, ne
1518 ; CHECK-BE-NEXT: and r2, r2, #1
1519 ; CHECK-BE-NEXT: rsbs r3, r3, #0
1520 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1
1521 ; CHECK-BE-NEXT: rsbs r2, r2, #0
1522 ; CHECK-BE-NEXT: vcvtt.f16.f32 s0, s5
1523 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1
1524 ; CHECK-BE-NEXT: vcvtb.f16.f32 s1, s6
1525 ; CHECK-BE-NEXT: vcvtt.f16.f32 s1, s7
1526 ; CHECK-BE-NEXT: lsls r2, r1, #31
1527 ; CHECK-BE-NEXT: bne .LBB26_5
1528 ; CHECK-BE-NEXT: @ %bb.1: @ %else
1529 ; CHECK-BE-NEXT: lsls r2, r1, #30
1530 ; CHECK-BE-NEXT: bmi .LBB26_6
1531 ; CHECK-BE-NEXT: .LBB26_2: @ %else2
1532 ; CHECK-BE-NEXT: lsls r2, r1, #29
1533 ; CHECK-BE-NEXT: bmi .LBB26_7
1534 ; CHECK-BE-NEXT: .LBB26_3: @ %else4
1535 ; CHECK-BE-NEXT: lsls r1, r1, #28
1536 ; CHECK-BE-NEXT: bmi .LBB26_8
1537 ; CHECK-BE-NEXT: .LBB26_4: @ %else6
1538 ; CHECK-BE-NEXT: add sp, #4
1539 ; CHECK-BE-NEXT: bx lr
1540 ; CHECK-BE-NEXT: .LBB26_5: @ %cond.store
1541 ; CHECK-BE-NEXT: vstr.16 s0, [r0]
1542 ; CHECK-BE-NEXT: lsls r2, r1, #30
1543 ; CHECK-BE-NEXT: bpl .LBB26_2
1544 ; CHECK-BE-NEXT: .LBB26_6: @ %cond.store1
1545 ; CHECK-BE-NEXT: vmovx.f16 s4, s0
1546 ; CHECK-BE-NEXT: vstr.16 s4, [r0, #2]
1547 ; CHECK-BE-NEXT: lsls r2, r1, #29
1548 ; CHECK-BE-NEXT: bpl .LBB26_3
1549 ; CHECK-BE-NEXT: .LBB26_7: @ %cond.store3
1550 ; CHECK-BE-NEXT: vstr.16 s1, [r0, #4]
1551 ; CHECK-BE-NEXT: lsls r1, r1, #28
1552 ; CHECK-BE-NEXT: bpl .LBB26_4
1553 ; CHECK-BE-NEXT: .LBB26_8: @ %cond.store5
1554 ; CHECK-BE-NEXT: vmovx.f16 s0, s1
1555 ; CHECK-BE-NEXT: vstr.16 s0, [r0, #6]
1556 ; CHECK-BE-NEXT: add sp, #4
1557 ; CHECK-BE-NEXT: bx lr
1656 ; CHECK-BE-LABEL: masked_v4f16_align1:
1657 ; CHECK-BE: @ %bb.0: @ %entry
1658 ; CHECK-BE-NEXT: .pad #20
1659 ; CHECK-BE-NEXT: sub sp, #20
1660 ; CHECK-BE-NEXT: vrev64.32 q1, q0
1661 ; CHECK-BE-NEXT: movs r1, #0
1662 ; CHECK-BE-NEXT: vcmp.f32 s4, #0
1663 ; CHECK-BE-NEXT: movs r2, #0
1664 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1665 ; CHECK-BE-NEXT: it gt
1666 ; CHECK-BE-NEXT: movgt r1, #1
1667 ; CHECK-BE-NEXT: cmp r1, #0
1668 ; CHECK-BE-NEXT: vcmp.f32 s5, #0
1669 ; CHECK-BE-NEXT: cset r1, ne
1670 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1671 ; CHECK-BE-NEXT: and r1, r1, #1
1672 ; CHECK-BE-NEXT: vcmp.f32 s6, #0
1673 ; CHECK-BE-NEXT: rsb.w r3, r1, #0
1674 ; CHECK-BE-NEXT: mov.w r1, #0
1675 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1
1676 ; CHECK-BE-NEXT: mov.w r3, #0
1677 ; CHECK-BE-NEXT: it gt
1678 ; CHECK-BE-NEXT: movgt r3, #1
1679 ; CHECK-BE-NEXT: cmp r3, #0
1680 ; CHECK-BE-NEXT: cset r3, ne
1681 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1682 ; CHECK-BE-NEXT: and r3, r3, #1
1683 ; CHECK-BE-NEXT: vcmp.f32 s7, #0
1684 ; CHECK-BE-NEXT: rsb.w r3, r3, #0
1685 ; CHECK-BE-NEXT: vcvtb.f16.f32 s0, s4
1686 ; CHECK-BE-NEXT: bfi r1, r3, #1, #1
1687 ; CHECK-BE-NEXT: mov.w r3, #0
1688 ; CHECK-BE-NEXT: it gt
1689 ; CHECK-BE-NEXT: movgt r3, #1
1690 ; CHECK-BE-NEXT: cmp r3, #0
1691 ; CHECK-BE-NEXT: cset r3, ne
1692 ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr
1693 ; CHECK-BE-NEXT: it gt
1694 ; CHECK-BE-NEXT: movgt r2, #1
1695 ; CHECK-BE-NEXT: cmp r2, #0
1696 ; CHECK-BE-NEXT: and r3, r3, #1
1697 ; CHECK-BE-NEXT: cset r2, ne
1698 ; CHECK-BE-NEXT: and r2, r2, #1
1699 ; CHECK-BE-NEXT: rsbs r3, r3, #0
1700 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1
1701 ; CHECK-BE-NEXT: rsbs r2, r2, #0
1702 ; CHECK-BE-NEXT: vcvtt.f16.f32 s0, s5
1703 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1
1704 ; CHECK-BE-NEXT: vcvtb.f16.f32 s1, s6
1705 ; CHECK-BE-NEXT: vcvtt.f16.f32 s1, s7
1706 ; CHECK-BE-NEXT: lsls r2, r1, #31
1707 ; CHECK-BE-NEXT: bne .LBB27_5
1708 ; CHECK-BE-NEXT: @ %bb.1: @ %else
1709 ; CHECK-BE-NEXT: lsls r2, r1, #30
1710 ; CHECK-BE-NEXT: bmi .LBB27_6
1711 ; CHECK-BE-NEXT: .LBB27_2: @ %else2
1712 ; CHECK-BE-NEXT: lsls r2, r1, #29
1713 ; CHECK-BE-NEXT: bmi .LBB27_7
1714 ; CHECK-BE-NEXT: .LBB27_3: @ %else4
1715 ; CHECK-BE-NEXT: lsls r1, r1, #28
1716 ; CHECK-BE-NEXT: bmi .LBB27_8
1717 ; CHECK-BE-NEXT: .LBB27_4: @ %else6
1718 ; CHECK-BE-NEXT: add sp, #20
1719 ; CHECK-BE-NEXT: bx lr
1720 ; CHECK-BE-NEXT: .LBB27_5: @ %cond.store
1721 ; CHECK-BE-NEXT: vstr.16 s0, [sp, #12]
1722 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #12]
1723 ; CHECK-BE-NEXT: strh r2, [r0]
1724 ; CHECK-BE-NEXT: lsls r2, r1, #30
1725 ; CHECK-BE-NEXT: bpl .LBB27_2
1726 ; CHECK-BE-NEXT: .LBB27_6: @ %cond.store1
1727 ; CHECK-BE-NEXT: vmovx.f16 s4, s0
1728 ; CHECK-BE-NEXT: vstr.16 s4, [sp, #8]
1729 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #8]
1730 ; CHECK-BE-NEXT: strh r2, [r0, #2]
1731 ; CHECK-BE-NEXT: lsls r2, r1, #29
1732 ; CHECK-BE-NEXT: bpl .LBB27_3
1733 ; CHECK-BE-NEXT: .LBB27_7: @ %cond.store3
1734 ; CHECK-BE-NEXT: vstr.16 s1, [sp, #4]
1735 ; CHECK-BE-NEXT: ldrh.w r2, [sp, #4]
1736 ; CHECK-BE-NEXT: strh r2, [r0, #4]
1737 ; CHECK-BE-NEXT: lsls r1, r1, #28
1738 ; CHECK-BE-NEXT: bpl .LBB27_4
1739 ; CHECK-BE-NEXT: .LBB27_8: @ %cond.store5
1740 ; CHECK-BE-NEXT: vmovx.f16 s0, s1
1741 ; CHECK-BE-NEXT: vstr.16 s0, [sp]
1742 ; CHECK-BE-NEXT: ldrh.w r1, [sp]
1743 ; CHECK-BE-NEXT: strh r1, [r0, #6]
1744 ; CHECK-BE-NEXT: add sp, #20
1745 ; CHECK-BE-NEXT: bx lr