Lines Matching refs:offs
4 ; VLDRH.u32 Qd, [base, offs, #uxtw #1]
12 %offs = load <4 x i32>, <4 x i32>* %offptr, align 4
13 %ptrs = getelementptr inbounds i16, i16* %base, <4 x i32> %offs
19 ; VSTRW.32 Qd, [base, offs, uxtw #2]
27 %offs = load <4 x i32>, <4 x i32>* %offptr, align 4
28 %ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs
33 ; VSTRW.32 Qd, [base, offs, uxtw #2]
41 %offs = load <4 x i32>, <4 x i32>* %offptr, align 4
42 %i32_ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs
48 ; VSTRW.32 Qd, [base, offs.zext, uxtw #2]
56 %offs = load <4 x i16>, <4 x i16>* %offptr, align 2
57 %offs.zext = zext <4 x i16> %offs to <4 x i32>
58 %ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.zext
63 ; VSTRW.32 Qd, [base, offs.sext, uxtw #2]
71 %offs = load <4 x i16>, <4 x i16>* %offptr, align 2
72 %offs.sext = sext <4 x i16> %offs to <4 x i32>
73 %ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.sext
78 ; VSTRW.32 Qd, [base, offs.zext, uxtw #2]
86 %offs = load <4 x i16>, <4 x i16>* %offptr, align 2
87 %offs.zext = zext <4 x i16> %offs to <4 x i32>
88 %i32_ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.zext
94 ; VSTRW.32 Qd, [base, offs.sext, uxtw #2]
102 %offs = load <4 x i16>, <4 x i16>* %offptr, align 2
103 %offs.sext = sext <4 x i16> %offs to <4 x i32>
104 %i32_ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.sext
110 ; VLDRH.u32 Qd, [base, offs.sext, uxtw #1]
118 %offs = load <4 x i16>, <4 x i16>* %offptr, align 2
119 %offs.sext = sext <4 x i16> %offs to <4 x i32>
120 %ptrs = getelementptr inbounds i16, i16* %base, <4 x i32> %offs.sext
126 ; VSTRH.32 Qd, [base, offs.sext, uxtw #1]
134 %offs = load <4 x i16>, <4 x i16>* %offptr, align 2
135 %offs.zext = zext <4 x i16> %offs to <4 x i32>
136 %ptrs = getelementptr inbounds i16, i16* %base, <4 x i32> %offs.zext
142 ; VSTRW.32 Qd, [base, offs.zext, uxtw #2]
150 %offs = load <4 x i8>, <4 x i8>* %offptr, align 1
151 %offs.zext = zext <4 x i8> %offs to <4 x i32>
152 %ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.zext
157 ; VSTRW.32 Qd, [base, offs.sext, uxtw #2]
165 %offs = load <4 x i8>, <4 x i8>* %offptr, align 1
166 %offs.sext = sext <4 x i8> %offs to <4 x i32>
167 %ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.sext
172 ; VSTRW.32 Qd, [base, offs.zext, uxtw #2]
180 %offs = load <4 x i8>, <4 x i8>* %offptr, align 1
181 %offs.zext = zext <4 x i8> %offs to <4 x i32>
182 %i32_ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.zext
188 ; VSTRW.32 Qd, [base, offs.sext, uxtw #2]
196 %offs = load <4 x i8>, <4 x i8>* %offptr, align 1
197 %offs.sext = sext <4 x i8> %offs to <4 x i32>
198 %i32_ptrs = getelementptr inbounds i32, i32* %base, <4 x i32> %offs.sext
204 ; VLDRH.z32 Qd, [base, offs.sext, uxtw #1]
212 %offs = load <4 x i8>, <4 x i8>* %offptr, align 1
213 %offs.sext = sext <4 x i8> %offs to <4 x i32>
214 %ptrs = getelementptr inbounds i16, i16* %base, <4 x i32> %offs.sext
220 ; VLDRH.z32 Qd, [base, offs.zext, uxtw #1]
228 %offs = load <4 x i8>, <4 x i8>* %offptr, align 1
229 %offs.zext = zext <4 x i8> %offs to <4 x i32>
230 %ptrs = getelementptr inbounds i16, i16* %base, <4 x i32> %offs.zext
258 %offs = load <4 x i32>, <4 x i32>* %offptr, align 4
259 %ptrs = getelementptr inbounds i16, i16* %base, <4 x i32> %offs