Lines Matching refs:pvaddu
745 ; CHECK-NEXT: pvaddu %v0, %v0, %v1
747 …%3 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vvvl(<256 x double> %0, <256 x double> %1, i…
752 declare <256 x double> @llvm.ve.vl.pvaddu.vvvl(<256 x double>, <256 x double>, i32)
760 ; CHECK-NEXT: pvaddu %v2, %v0, %v1
765 …%4 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vvvvl(<256 x double> %0, <256 x double> %1, …
770 declare <256 x double> @llvm.ve.vl.pvaddu.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
778 ; CHECK-NEXT: pvaddu %v0, %s0, %v0
780 %3 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vsvl(i64 %0, <256 x double> %1, i32 256)
785 declare <256 x double> @llvm.ve.vl.pvaddu.vsvl(i64, <256 x double>, i32)
793 ; CHECK-NEXT: pvaddu %v1, %s0, %v0
798 …%4 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vsvvl(i64 %0, <256 x double> %1, <256 x doub…
803 declare <256 x double> @llvm.ve.vl.pvaddu.vsvvl(i64, <256 x double>, <256 x double>, i32)
811 ; CHECK-NEXT: pvaddu %v2, %v0, %v1, %vm2
816 …%5 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vvvMvl(<256 x double> %0, <256 x double> %1,…
821 declare <256 x double> @llvm.ve.vl.pvaddu.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x…
829 ; CHECK-NEXT: pvaddu %v1, %s0, %v0, %vm2
834 …%5 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vsvMvl(i64 %0, <256 x double> %1, <512 x i1>…
839 declare <256 x double> @llvm.ve.vl.pvaddu.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i…