select-cmp.mir - OpenGrok cross reference for /external/llvm-project/llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir

Lines Matching refs:eflags
104     ; CHECK: CMP8rr [[COPY]], [[COPY1]], implicit-def $eflags
105     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
107     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
140     ; CHECK: CMP16rr [[COPY]], [[COPY1]], implicit-def $eflags
141     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
143     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
176     ; CHECK: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags
177     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
179     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
212     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
213     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
215     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
248     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
249     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
251     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
284     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
285     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
287     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
320     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
321     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
323     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
356     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
357     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
359     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
392     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
393     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
395     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
428     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
429     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
431     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
464     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
465     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 13, implicit $eflags
467     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
500     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
501     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 12, implicit $eflags
503     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags
536     ; CHECK: CMP32rr [[COPY]], [[COPY1]], implicit-def $eflags
537     ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 14, implicit $eflags
539     ; CHECK: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[MOVZX32rr8_]], 1, implicit-def $eflags