Lines Matching refs:i8
9 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>)
10 declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>)
12 define <32 x i8> @combine_pshufb_pslldq(<32 x i8> %a0) {
17 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 12…
18 …%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 32, i32 32, i32 32, i3…
19 ret <32 x i8> %2
22 define <32 x i8> @combine_pshufb_psrldq(<32 x i8> %a0) {
27 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14…
28 …%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 8, i32 9, i32 10, i32 …
29 ret <32 x i8> %2
32 define <32 x i8> @combine_pshufb_vpermd(<8 x i32> %a) {
38 %tmp1 = bitcast <8 x i32> %tmp0 to <32 x i8>
39 …%tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i3…
40 ret <32 x i8> %tmp2
43 define <32 x i8> @combine_pshufb_vpermps(<8 x float> %a) {
49 %tmp1 = bitcast <8 x float> %tmp0 to <32 x i8>
50 …%tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i3…
51 ret <32 x i8> %tmp2
54 define <32 x i8> @combine_and_pshufb(<32 x i8> %a0) {
60 …%1 = shufflevector <32 x i8> %a0, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32…
61 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,…
62 ret <32 x i8> %2
65 define <32 x i8> @combine_pshufb_and(<32 x i8> %a0) {
71 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1…
72 …%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 …
73 ret <32 x i8> %2
89 %2 = bitcast <4 x i64> %1 to <32 x i8>
90 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14,…
91 %4 = bitcast <32 x i8> %3 to <4 x i64>
109 %2 = bitcast <4 x i64> %1 to <32 x i8>
110 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14,…
111 %4 = bitcast <32 x i8> %3 to <4 x i64>
140 define <32 x i8> @combine_permq_pshufb_as_vmovaps(<4 x i64> %a0) {
146 %2 = bitcast <4 x i64> %1 to <32 x i8>
147 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14,…
148 ret <32 x i8> %3
151 define <32 x i8> @combine_permq_pshufb_as_vpblendd(<4 x i64> %a0) {
158 %2 = bitcast <4 x i64> %1 to <32 x i8>
159 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 255, i8 255, i8 255, i8 255, i8 255, i8 255…
160 ret <32 x i8> %3
163 define <16 x i8> @combine_pshufb_as_vpbroadcastb128(<16 x i8> %a) {
168 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> zeroinitializer)
169 ret <16 x i8> %1
172 define <32 x i8> @combine_pshufb_as_vpbroadcastb256(<2 x i64> %a) {
178 %2 = bitcast <4 x i64> %1 to <32 x i8>
179 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> zeroinitializer)
180 %4 = bitcast <32 x i8> %3 to <8 x i32>
182 %6 = bitcast <8 x i32> %5 to <32 x i8>
183 ret <32 x i8> %6
186 define <16 x i8> @combine_pshufb_as_vpbroadcastw128(<16 x i8> %a) {
191 …x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 …
192 ret <16 x i8> %1
195 define <32 x i8> @combine_pshufb_as_vpbroadcastw256(<2 x i64> %a) {
201 %2 = bitcast <4 x i64> %1 to <32 x i8>
202 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1…
203 %4 = bitcast <32 x i8> %3 to <8 x i32>
205 %6 = bitcast <8 x i32> %5 to <32 x i8>
206 ret <32 x i8> %6
209 define <16 x i8> @combine_pshufb_as_vpbroadcastd128(<16 x i8> %a) {
221 …x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 …
222 …%2 = add <16 x i8> %1, <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8…
223 ret <16 x i8> %2
244 define <16 x i8> @combine_pshufb_as_vpbroadcastq128(<16 x i8> %a) {
249 …x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 …
250 ret <16 x i8> %1
276 %1 = bitcast <4 x float> %a to <16 x i8>
277 …x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 …
278 %3 = bitcast <16 x i8> %2 to <4 x float>
304 define <16 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb128(<16 x i8> %a) {
309 %1 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> zeroinitializer
310 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> zeroinitializer)
311 ret <16 x i8> %2
314 define <32 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb256(<32 x i8> %a) {
319 %1 = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> zeroinitializer
320 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> zeroinitializer)
321 ret <32 x i8> %2
330 %2 = bitcast <4 x float> %1 to <16 x i8>
331 …x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 …
332 %4 = bitcast <16 x i8> %3 to <4 x float>
387 define <4 x i64> @combine_pshufb_as_zext(<32 x i8> %a0) {
392 …%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 1…
393 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,…
394 %3 = bitcast <32 x i8> %2 to <4 x i64>
398 define <4 x i64> @combine_pshufb_as_zext128(<32 x i8> %a0) {
405 …%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 15, i32 14, i32 13, i32 12, i32…
406 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -…
407 %3 = bitcast <32 x i8> %2 to <4 x i64>
416 %1 = bitcast <4 x double> %a0 to <32 x i8>
417 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7…
418 %3 = bitcast <32 x i8> %2 to <4 x double>
428 %1 = bitcast <8 x float> %a0 to <32 x i8>
429 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i…
430 %3 = bitcast <32 x i8> %2 to <8 x float>
434 define <32 x i8> @combine_pshufb_as_pslldq(<32 x i8> %a0) {
439 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 12…
440 ret <32 x i8> %res0
443 define <32 x i8> @combine_pshufb_as_psrldq(<32 x i8> %a0) {
448 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128…
449 ret <32 x i8> %res0
452 define <32 x i8> @combine_pshufb_as_psrlw(<32 x i8> %a0) {
457 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 1, i8 128, i8 3, i8 128, i8 5, i8 128, i8 …
458 ret <32 x i8> %res0
461 define <32 x i8> @combine_pshufb_as_pslld(<32 x i8> %a0) {
466 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 0, i8 128, i8 128,…
467 ret <32 x i8> %res0
470 define <32 x i8> @combine_pshufb_as_psrlq(<32 x i8> %a0) {
475 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 …
476 ret <32 x i8> %res0
479 define <32 x i8> @combine_pshufb_as_pshuflw(<32 x i8> %a0) {
484 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 …
485 ret <32 x i8> %res0
488 define <32 x i8> @combine_pshufb_as_pshufhw(<32 x i8> %a0) {
493 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 …
494 ret <32 x i8> %res0
497 define <32 x i8> @combine_pshufb_not_as_pshufw(<32 x i8> %a0) {
509 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 …
510 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %res0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i…
511 ret <32 x i8> %res1
514 define <32 x i8> @combine_pshufb_as_unpacklo_undef(<32 x i8> %a0) {
518 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 undef, i8 0, i8 undef, i8 1, i8 undef, i8 …
519 …%2 = shufflevector <32 x i8> %1, <32 x i8> undef, <32 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i…
520 ret <32 x i8> %2
523 define <32 x i8> @combine_pshufb_as_unpacklo_zero(<32 x i8> %a0) {
529 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 2, i8 3, i8 -1, …
530 ret <32 x i8> %1
533 define <32 x i8> @combine_pshufb_as_unpackhi_zero(<32 x i8> %a0) {
539 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 8, i8 -1, i8 9, i8 -1, i8 10, i8 -1…
540 ret <32 x i8> %1
543 define <32 x i8> @combine_psrlw_pshufb(<16 x i16> %a0) {
554 %2 = bitcast <16 x i16> %1 to <32 x i8>
555 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 1, i8 0, i8 3, i8 2, i8 5, i8 4, i8 7, i8 6…
556 ret <32 x i8> %3
559 define <32 x i8> @combine_pslld_pshufb(<8 x i32> %a0) {
570 %2 = bitcast <8 x i32> %1 to <32 x i8>
571 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4…
572 ret <32 x i8> %3
575 define <32 x i8> @combine_psrlq_pshufb(<4 x i64> %a0) {
581 %2 = bitcast <4 x i64> %1 to <32 x i8>
582 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0…
583 ret <32 x i8> %3
586 define <32 x i8> @combine_unpack_unpack_pshufb(<32 x i8> %a0) {
591 …%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, …
592 …%2 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 und…
593 …%3 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 u…
594 …%4 = shufflevector <32 x i8> %1, <32 x i8> %2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i3…
595 …%5 = shufflevector <32 x i8> %1, <32 x i8> %3, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i3…
596 …%6 = shufflevector <32 x i8> %4, <32 x i8> %5, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i3…
597 ret <32 x i8> %6
613 define <32 x i8> @shuffle_combine_packsswb_pshufb(<16 x i16> %a0, <16 x i16> %a1) {
621 %3 = tail call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %1, <16 x i16> %2)
622 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0…
623 ret <32 x i8> %4
625 declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone
639 define <32 x i8> @shuffle_combine_packuswb_pshufb(<16 x i16> %a0, <16 x i16> %a1) {
646 %3 = tail call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %1, <16 x i16> %2)
647 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0…
648 ret <32 x i8> %4
650 declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readnone
652 define <32 x i8> @combine_pshufb_as_packsswb(<16 x i16> %a0, <16 x i16> %a1) nounwind {
661 %3 = bitcast <16 x i16> %1 to <32 x i8>
662 %4 = bitcast <16 x i16> %2 to <32 x i8>
663 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8…
664 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %4, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -…
665 %7 = or <32 x i8> %5, %6
666 ret <32 x i8> %7
669 define <32 x i8> @combine_pshufb_as_packuswb(<16 x i16> %a0, <16 x i16> %a1) nounwind {
678 %3 = bitcast <16 x i16> %1 to <32 x i8>
679 %4 = bitcast <16 x i16> %2 to <32 x i8>
680 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8…
681 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %4, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -…
682 %7 = or <32 x i8> %5, %6
683 ret <32 x i8> %7
686 define <16 x i8> @combine_pshufb_insertion_as_broadcast_v2i64(i64 %a0) {
698 %2 = bitcast <2 x i64> %1 to <16 x i8>
699 …x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 …
700 ret <16 x i8> %3
720 define <32 x i8> @combine_pshufb_pshufb_or_as_blend(<32 x i8> %a0, <32 x i8> %a1) {
725 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 …
726 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a1, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 …
727 %3 = or <32 x i8> %1, %2
728 ret <32 x i8> %3
731 define <32 x i8> @combine_pshufb_pshufb_or_as_unpcklbw(<32 x i8> %a0, <32 x i8> %a1) {
736 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, …
737 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a1, <32 x i8> <i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1,…
738 %3 = or <32 x i8> %1, %2
739 ret <32 x i8> %3
742 define <32 x i8> @combine_pshufb_pshufb_or_pshufb(<32 x i8> %a0) {
747 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, …
748 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2,…
749 %3 = or <32 x i8> %1, %2
750 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3…
751 ret <32 x i8> %4
772 define <32 x i8> @constant_fold_pshufb_256() {
777 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, …
778 ret <32 x i8> %1
807 define <32 x i8> @PR27320(<8 x i32> %a0) {
814 %2 = bitcast <8 x i32> %1 to <32 x i8>
815 …%3 = shufflevector <32 x i8> %2, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 1, i32 2, i32 3, i…
816 ret <32 x i8> %3