Lines Matching refs:RES
8 ; CHECK-NEXT: [[RES:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
9 ; CHECK-NEXT: ret i32 [[RES]]
19 ; CHECK-NEXT: [[RES:%.*]] = add nsw i32 [[A]], [[B]]
22 ; CHECK-NEXT: ret i32 [[RES]]
32 ; CHECK-NEXT: [[RES:%.*]] = add nuw i32 [[A]], [[B]]
35 ; CHECK-NEXT: ret i32 [[RES]]
48 ; CHECK-NEXT: [[RES:%.*]] = add nuw nsw i32 [[A]], [[B]]
51 ; CHECK-NEXT: ret i32 [[RES]]
59 ; CHECK-NEXT: [[RES:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
60 ; CHECK-NEXT: ret i32 [[RES]]
70 ; CHECK-NEXT: [[RES:%.*]] = sub nsw i32 [[A]], [[B]]
73 ; CHECK-NEXT: ret i32 [[RES]]
83 ; CHECK-NEXT: [[RES:%.*]] = sub nuw i32 [[A]], [[B]]
86 ; CHECK-NEXT: ret i32 [[RES]]
99 ; CHECK-NEXT: [[RES:%.*]] = sub nuw nsw i32 [[A]], [[B]]
102 ; CHECK-NEXT: ret i32 [[RES]]
110 ; CHECK-NEXT: [[RES:%.*]] = mul i32 [[A:%.*]], [[B:%.*]]
111 ; CHECK-NEXT: ret i32 [[RES]]
121 ; CHECK-NEXT: [[RES:%.*]] = mul nsw i32 [[A]], [[B]]
124 ; CHECK-NEXT: ret i32 [[RES]]
134 ; CHECK-NEXT: [[RES:%.*]] = mul nuw i32 [[A]], [[B]]
137 ; CHECK-NEXT: ret i32 [[RES]]
150 ; CHECK-NEXT: [[RES:%.*]] = mul nuw nsw i32 [[A]], [[B]]
153 ; CHECK-NEXT: ret i32 [[RES]]
161 ; CHECK-NEXT: [[RES:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
162 ; CHECK-NEXT: ret i32 [[RES]]
172 ; CHECK-NEXT: [[RES:%.*]] = sdiv exact i32 [[A]], [[B]]
175 ; CHECK-NEXT: ret i32 [[RES]]
183 ; CHECK-NEXT: [[RES:%.*]] = udiv i32 [[A:%.*]], [[B:%.*]]
184 ; CHECK-NEXT: ret i32 [[RES]]
194 ; CHECK-NEXT: [[RES:%.*]] = udiv exact i32 [[A]], [[B]]
197 ; CHECK-NEXT: ret i32 [[RES]]
206 ; CHECK-NEXT: [[RES:%.*]] = ashr i32 [[A:%.*]], [[B]]
209 ; CHECK-NEXT: ret i32 [[RES]]
218 ; CHECK-NEXT: [[RES:%.*]] = ashr exact i32 [[A:%.*]], [[B]]
221 ; CHECK-NEXT: ret i32 [[RES]]
230 ; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[A:%.*]], [[B]]
233 ; CHECK-NEXT: ret i32 [[RES]]
242 ; CHECK-NEXT: [[RES:%.*]] = lshr exact i32 [[A:%.*]], [[B]]
245 ; CHECK-NEXT: ret i32 [[RES]]
254 ; CHECK-NEXT: [[RES:%.*]] = shl i32 [[A:%.*]], [[B]]
257 ; CHECK-NEXT: ret i32 [[RES]]
266 ; CHECK-NEXT: [[RES:%.*]] = shl nsw i32 [[A:%.*]], [[B]]
269 ; CHECK-NEXT: ret i32 [[RES]]
278 ; CHECK-NEXT: [[RES:%.*]] = shl nuw i32 [[A:%.*]], [[B]]
281 ; CHECK-NEXT: ret i32 [[RES]]
290 ; CHECK-NEXT: [[RES:%.*]] = shl nuw nsw i32 [[A:%.*]], [[B]]
293 ; CHECK-NEXT: ret i32 [[RES]]
302 ; CHECK-NEXT: [[RES:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 [[IDX]]
305 ; CHECK-NEXT: ret i32 [[RES]]
314 ; CHECK-NEXT: [[RES:%.*]] = insertelement <4 x i32> [[V:%.*]], i32 [[VAL:%.*]], i32 [[IDX]]
317 ; CHECK-NEXT: ret <4 x i32> [[RES]]