Lines Matching +full:0 +full:x6e

3 # CHECK: v_dot2c_f32_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x6e]
4 0x01,0x05,0x0a,0x6e
6 # CHECK: v_dot2c_f32_f16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x6f]
7 0x01,0x05,0xfe,0x6f
9 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
10 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x00
12 …2_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,…
13 0xfa,0x04,0xfe,0x6f,0x01,0xe4,0x00,0x00
15 …2_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
16 0xfa,0x04,0x0a,0x6e,0xff,0xe4,0x00,0x00
18 …2_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,…
19 0xfa,0xfe,0x0b,0x6e,0x01,0xe4,0x00,0x00
21 …_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6…
22 0xfa,0x04,0x0a,0x6e,0x01,0x1b,0x00,0x00
24 …f32_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
25 0xfa,0x04,0x0a,0x6e,0x01,0x40,0x01,0x00
27 …16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
28 0xfa,0x04,0x0a,0x6e,0x01,0x41,0x01,0x00
30 …2_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
31 0xfa,0x04,0x0a,0x6e,0x01,0x42,0x01,0x00
33 …2_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
34 0xfa,0x04,0x0a,0x6e,0x01,0x43,0x01,0x00
36 …f32_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
37 0xfa,0x04,0x0a,0x6e,0x01,0x30,0x01,0x00
39 …f32_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
40 0xfa,0x04,0x0a,0x6e,0x01,0x34,0x01,0x00
42 …f32_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
43 0xfa,0x04,0x0a,0x6e,0x01,0x38,0x01,0x00
45 …f32_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
46 0xfa,0x04,0x0a,0x6e,0x01,0x3c,0x01,0x00
48 …_f32_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
49 0xfa,0x04,0x0a,0x6e,0x01,0x01,0x01,0x00
51 …f32_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
52 0xfa,0x04,0x0a,0x6e,0x01,0x0f,0x01,0x00
54 …_f32_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
55 0xfa,0x04,0x0a,0x6e,0x01,0x11,0x01,0x00
57 …f32_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
58 0xfa,0x04,0x0a,0x6e,0x01,0x1f,0x01,0x00
60 …_f32_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
61 0xfa,0x04,0x0a,0x6e,0x01,0x21,0x01,0x00
63 …f32_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01…
64 0xfa,0x04,0x0a,0x6e,0x01,0x2f,0x01,0x00
66 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
67 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x10
69 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
70 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x30
72 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
73 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0xf0
75 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,…
76 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x01
78 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,…
79 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x03
81 …f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,…
82 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x0f
84 …_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04…
85 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x08,0x00
87 …32_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
88 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x10,0x00
90 …2_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
91 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x20,0x00
93 …32_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
94 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x40,0x00
96 …2_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
97 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x80,0x00
99 # CHECK: v_dot2c_i32_i16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x70]
100 0x01,0x05,0x0a,0x70
102 # CHECK: v_dot2c_i32_i16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x71]
103 0x01,0x05,0xfe,0x71
105 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
106 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x00
108 …2_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,…
109 0xfa,0x04,0xfe,0x71,0x01,0xe4,0x00,0x00
111 …2_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
112 0xfa,0x04,0x0a,0x70,0xff,0xe4,0x00,0x00
114 …2_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,…
115 0xfa,0xfe,0x0b,0x70,0x01,0xe4,0x00,0x00
117 …_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x7…
118 0xfa,0x04,0x0a,0x70,0x01,0x1b,0x00,0x00
120 …i32_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
121 0xfa,0x04,0x0a,0x70,0x01,0x40,0x01,0x00
123 …16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
124 0xfa,0x04,0x0a,0x70,0x01,0x41,0x01,0x00
126 …2_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
127 0xfa,0x04,0x0a,0x70,0x01,0x42,0x01,0x00
129 …2_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
130 0xfa,0x04,0x0a,0x70,0x01,0x43,0x01,0x00
132 …i32_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
133 0xfa,0x04,0x0a,0x70,0x01,0x30,0x01,0x00
135 …i32_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
136 0xfa,0x04,0x0a,0x70,0x01,0x34,0x01,0x00
138 …i32_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
139 0xfa,0x04,0x0a,0x70,0x01,0x38,0x01,0x00
141 …i32_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
142 0xfa,0x04,0x0a,0x70,0x01,0x3c,0x01,0x00
144 …_i32_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
145 0xfa,0x04,0x0a,0x70,0x01,0x01,0x01,0x00
147 …i32_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
148 0xfa,0x04,0x0a,0x70,0x01,0x0f,0x01,0x00
150 …_i32_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
151 0xfa,0x04,0x0a,0x70,0x01,0x11,0x01,0x00
153 …i32_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
154 0xfa,0x04,0x0a,0x70,0x01,0x1f,0x01,0x00
156 …_i32_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
157 0xfa,0x04,0x0a,0x70,0x01,0x21,0x01,0x00
159 …i32_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01…
160 0xfa,0x04,0x0a,0x70,0x01,0x2f,0x01,0x00
162 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
163 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x10
165 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
166 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x30
168 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
169 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0xf0
171 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,…
172 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x01
174 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,…
175 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x03
177 …i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,…
178 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x0f
180 …_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04…
181 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x08,0x00
183 # CHECK: v_dot4c_i32_i8_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x72]
184 0x01,0x05,0x0a,0x72
186 # CHECK: v_dot4c_i32_i8_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x73]
187 0x01,0x05,0xfe,0x73
189 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
190 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x00
192 …32_i8_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,…
193 0xfa,0x04,0xfe,0x73,0x01,0xe4,0x00,0x00
195 …32_i8_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
196 0xfa,0x04,0x0a,0x72,0xff,0xe4,0x00,0x00
198 …32_i8_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,…
199 0xfa,0xfe,0x0b,0x72,0x01,0xe4,0x00,0x00
201 …2_i8_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x7…
202 0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00
204 …_i32_i8_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
205 0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0x00
207 …i8_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
208 0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0x00
210 …32_i8_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
211 0xfa,0x04,0x0a,0x72,0x01,0x42,0x01,0x00
213 …32_i8_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
214 0xfa,0x04,0x0a,0x72,0x01,0x43,0x01,0x00
216 …_i32_i8_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
217 0xfa,0x04,0x0a,0x72,0x01,0x30,0x01,0x00
219 …_i32_i8_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
220 0xfa,0x04,0x0a,0x72,0x01,0x34,0x01,0x00
222 …_i32_i8_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
223 0xfa,0x04,0x0a,0x72,0x01,0x38,0x01,0x00
225 …_i32_i8_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
226 0xfa,0x04,0x0a,0x72,0x01,0x3c,0x01,0x00
228 …c_i32_i8_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
229 0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0x00
231 …_i32_i8_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
232 0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0x00
234 …c_i32_i8_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
235 0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0x00
237 …_i32_i8_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
238 0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0x00
240 …c_i32_i8_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
241 0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0x00
243 …_i32_i8_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01…
244 0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0x00
246 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
247 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x10
249 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
250 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x30
252 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
253 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xf0
255 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,…
256 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x01
258 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,…
259 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x03
261 …_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,…
262 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x0f
264 …_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04…
265 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x08,0x00
267 # CHECK: v_dot8c_i32_i4_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x74]
268 0x01,0x05,0x0a,0x74
270 # CHECK: v_dot8c_i32_i4_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x75]
271 0x01,0x05,0xfe,0x75
273 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
274 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x00
276 …32_i4_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,…
277 0xfa,0x04,0xfe,0x75,0x01,0xe4,0x00,0x00
279 …32_i4_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
280 0xfa,0x04,0x0a,0x74,0xff,0xe4,0x00,0x00
282 …32_i4_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,…
283 0xfa,0xfe,0x0b,0x74,0x01,0xe4,0x00,0x00
285 …2_i4_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x7…
286 0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00
288 …_i32_i4_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
289 0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0x00
291 …i4_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
292 0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0x00
294 …32_i4_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
295 0xfa,0x04,0x0a,0x74,0x01,0x42,0x01,0x00
297 …32_i4_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
298 0xfa,0x04,0x0a,0x74,0x01,0x43,0x01,0x00
300 …_i32_i4_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
301 0xfa,0x04,0x0a,0x74,0x01,0x30,0x01,0x00
303 …_i32_i4_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
304 0xfa,0x04,0x0a,0x74,0x01,0x34,0x01,0x00
306 …_i32_i4_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
307 0xfa,0x04,0x0a,0x74,0x01,0x38,0x01,0x00
309 …_i32_i4_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
310 0xfa,0x04,0x0a,0x74,0x01,0x3c,0x01,0x00
312 …c_i32_i4_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
313 0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0x00
315 …_i32_i4_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
316 0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0x00
318 …c_i32_i4_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
319 0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0x00
321 …_i32_i4_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
322 0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0x00
324 …c_i32_i4_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
325 0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0x00
327 …_i32_i4_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01…
328 0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0x00
330 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
331 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x10
333 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
334 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x30
336 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
337 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xf0
339 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,…
340 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x01
342 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,…
343 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x03
345 …_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,…
346 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x0f
348 …_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04…
349 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x08,0x00
351 # CHECK: v_pk_fmac_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x78]
352 0x01,0x05,0x0a,0x78
354 # CHECK: v_pk_fmac_f16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x79]
355 0x01,0x05,0xfe,0x79
357 # CHECK: v_pk_fmac_f16_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x78]
358 0xff,0x05,0x0a,0x78
360 # CHECK: v_pk_fmac_f16_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x78]
361 0x01,0x04,0x0a,0x78
363 # CHECK: v_pk_fmac_f16_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x78]
364 0x6a,0x04,0x0a,0x78
366 # CHECK: v_pk_fmac_f16_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x78]
367 0x6b,0x04,0x0a,0x78
369 # CHECK: v_pk_fmac_f16_e32 v5, ttmp11, v2 ; encoding: [0x77,0x04,0x0a,0x78]
370 0x77,0x04,0x0a,0x78
372 # CHECK: v_pk_fmac_f16_e32 v5, m0, v2 ; encoding: [0x7c,0x04,0x0a,0x78]
373 0x7c,0x04,0x0a,0x78
375 # CHECK: v_pk_fmac_f16_e32 v5, exec_lo, v2 ; encoding: [0x7e,0x04,0x0a,0x78]
376 0x7e,0x04,0x0a,0x78
378 # CHECK: v_pk_fmac_f16_e32 v5, exec_hi, v2 ; encoding: [0x7f,0x04,0x0a,0x78]
379 0x7f,0x04,0x0a,0x78
381 # CHECK: v_pk_fmac_f16_e32 v5, 0, v2 ; encoding: [0x80,0x04,0x0a,0x78]
382 0x80,0x04,0x0a,0x78
384 # CHECK: v_pk_fmac_f16_e32 v5, -1, v2 ; encoding: [0xc1,0x04,0x0a,0x78]
385 0xc1,0x04,0x0a,0x78
387 # CHECK: v_pk_fmac_f16_e32 v5, 0.5, v2 ; encoding: [0xf0,0x04,0x0a,0x78]
388 0xf0,0x04,0x0a,0x78
390 # CHECK: v_pk_fmac_f16_e32 v5, -4.0, v2 ; encoding: [0xf7,0x04,0x0a,0x78]
391 0xf7,0x04,0x0a,0x78
393 # CHECK: v_pk_fmac_f16_e32 v5, v1, v255 ; encoding: [0x01,0xff,0x0b,0x78]
394 0x01,0xff,0x0b,0x78