Lines Matching refs:sw
7 ; Expect to skip merging two empty blocks (sw.bb and sw.bb2) into sw.epilog
12 ; CHECK: i32 10, label %sw.bb
13 ; CHECK: i32 20, label %sw.bb2
15 switch i32 %c, label %sw.default [
16 i32 10, label %sw.bb
17 i32 20, label %sw.bb2
18 i32 30, label %sw.bb3
19 i32 40, label %sw.bb4
22 sw.bb: ; preds = %entry
23 br label %sw.epilog
25 sw.bb2: ; preds = %entry
26 br label %sw.epilog
28 sw.bb3: ; preds = %entry
30 br label %sw.epilog
32 sw.bb4: ; preds = %entry
34 br label %sw.epilog
36 sw.default: ; preds = %entry
38 br label %sw.epilog
40 ; CHECK-LABEL: sw.epilog:
41 …ECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.…
42 sw.epilog: ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb
43 …%fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ]…
49 ; Expect not to merge sw.bb2 because of the conflict in the incoming value from
50 ; sw.bb which is already merged.
54 ; CHECK: i32 10, label %sw.epilog
55 ; CHECK: i32 20, label %sw.bb2
57 switch i32 %c, label %sw.default [
58 i32 10, label %sw.bb
59 i32 20, label %sw.bb2
60 i32 30, label %sw.bb3
61 i32 40, label %sw.bb4
64 sw.bb: ; preds = %entry
65 br label %sw.epilog
67 sw.bb2: ; preds = %entry
68 br label %sw.epilog
70 sw.bb3: ; preds = %entry
72 br label %sw.epilog
74 sw.bb4: ; preds = %entry
76 br label %sw.epilog
78 sw.default: ; preds = %entry
80 br label %sw.epilog
82 ; CHECK-LABEL: sw.epilog:
83 ; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %…
84 sw.epilog: ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb
85 …%fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ]…
92 ; from them are same. We expect to merge both empty blocks (sw.bb and sw.bb2)
97 ; CHECK: i32 10, label %sw.epilog
98 ; CHECK: i32 20, label %sw.epilog
100 switch i32 %c, label %sw.default [
101 i32 10, label %sw.bb
102 i32 20, label %sw.bb2
103 i32 30, label %sw.bb3
104 i32 40, label %sw.bb4
107 sw.bb: ; preds = %entry
108 br label %sw.epilog
110 sw.bb2: ; preds = %entry
111 br label %sw.epilog
113 sw.bb3: ; preds = %entry
115 br label %sw.epilog
117 sw.bb4: ; preds = %entry
119 br label %sw.epilog
121 sw.default: ; preds = %entry
123 br label %sw.epilog
125 ; CHECK-LABEL: sw.epilog:
126 ; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %…
127 sw.epilog: ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb
128 …%fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %sw.bb2 ]…
156 br i1 %cond, label %while.cond.preheader, label %sw.epilog
188 br i1 %tobool3, label %sw.epilog, label %while.body4
195 sw.epilog: ; preds = %while.cond2, %entry