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Lines Matching refs:LSHR

12 ; CHECK-NEXT:    [[LSHR:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
13 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[LSHR]], -1
24 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i16 [[X:%.*]], [[Y:%.*]]
25 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i16 [[LSHR]], -1
36 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
37 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[LSHR]], -1
48 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[X:%.*]], [[Y:%.*]]
49 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i64 [[LSHR]], -1
60 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
61 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[LSHR]], 0
74 ; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> [[X:%.*]], [[Y:%.*]]
75 ; CHECK-NEXT: [[R:%.*]] = icmp sgt <4 x i32> [[LSHR]], <i32 -1, i32 -1, i32 -1, i32 -1>
86 ; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> [[X:%.*]], [[Y:%.*]]
87 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], <i32 -2147483648, i32 undef, i32 -2147483648…
99 ; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> [[X:%.*]], [[Y:%.*]]
100 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], <i32 -2147483648, i32 -2147483648, i32 -2147…
112 ; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> [[X:%.*]], [[Y:%.*]]
113 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[LSHR]], <i32 -2147483648, i32 undef, i32 -2147483648…
128 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
129 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[LSHR]], [[Z:%.*]]
131 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[LSHR]], -1
145 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
146 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], -2147483648
163 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
164 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], -2147483648
166 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LSHR]], [[Z:%.*]]
196 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
197 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[LSHR]], -1
210 ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
211 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[LSHR]], 0