Lines Matching refs:T3
15 ; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[X:%.*]], 30
16 ; CHECK-NEXT: ret i32 [[T3]]
27 ; CHECK-NEXT: [[T3:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 30, i32 30>
28 ; CHECK-NEXT: ret <2 x i32> [[T3]]
39 ; CHECK-NEXT: [[T3:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 30, i32 30>
40 ; CHECK-NEXT: ret <2 x i32> [[T3]]
53 ; CHECK-NEXT: [[T3:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 30, i32 undef, i32 30>
54 ; CHECK-NEXT: ret <3 x i32> [[T3]]
65 ; CHECK-NEXT: [[T3:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 30, i32 undef, i32 30>
66 ; CHECK-NEXT: ret <3 x i32> [[T3]]
77 ; CHECK-NEXT: [[T3:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 30, i32 undef, i32 30>
78 ; CHECK-NEXT: ret <3 x i32> [[T3]]
90 ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X:%.*]], 30
91 ; CHECK-NEXT: ret i32 [[T3]]
101 ; CHECK-NEXT: [[T3:%.*]] = ashr i32 [[X:%.*]], 30
102 ; CHECK-NEXT: ret i32 [[T3]]
114 ; CHECK-NEXT: [[T3:%.*]] = lshr exact i32 [[X:%.*]], 30
115 ; CHECK-NEXT: ret i32 [[T3]]
125 ; CHECK-NEXT: [[T3:%.*]] = ashr exact i32 [[X:%.*]], 30
126 ; CHECK-NEXT: ret i32 [[T3]]
136 ; CHECK-NEXT: [[T3:%.*]] = shl nuw i32 [[X:%.*]], 30
137 ; CHECK-NEXT: ret i32 [[T3]]
147 ; CHECK-NEXT: [[T3:%.*]] = shl nsw i32 [[X:%.*]], 30
148 ; CHECK-NEXT: ret i32 [[T3]]
182 ; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T1]], [[T2]]
183 ; CHECK-NEXT: ret i32 [[T3]]
197 ; CHECK-NEXT: [[T3:%.*]] = lshr <2 x i32> [[T1]], [[T2]]
198 ; CHECK-NEXT: ret <2 x i32> [[T3]]
213 ; CHECK-NEXT: [[T3:%.*]] = ashr i32 [[T1]], [[T2]]
214 ; CHECK-NEXT: ret i32 [[T3]]
227 ; CHECK-NEXT: [[T3:%.*]] = ashr i32 [[T1]], [[T2]]
228 ; CHECK-NEXT: ret i32 [[T3]]
241 ; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T1]], [[T2]]
242 ; CHECK-NEXT: ret i32 [[T3]]
255 ; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T1]], [[T2]]
256 ; CHECK-NEXT: ret i32 [[T3]]
271 ; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T1]], [[T2]]
272 ; CHECK-NEXT: ret i32 [[T3]]
285 ; CHECK-NEXT: [[T3:%.*]] = ashr i32 [[T1]], [[T2]]
286 ; CHECK-NEXT: ret i32 [[T3]]
299 ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T1]], [[T2]]
300 ; CHECK-NEXT: ret i32 [[T3]]
313 ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T1]], [[T2]]
314 ; CHECK-NEXT: ret i32 [[T3]]
328 ; CHECK-NEXT: [[T3:%.*]] = zext i1 [[T2]] to i3
329 ; CHECK-NEXT: [[T4:%.*]] = lshr i3 [[T1]], [[T3]]
330 ; CHECK-NEXT: [[T5:%.*]] = lshr i3 [[T4]], [[T3]]