Lines Matching refs:i1
7 define i1 @test1(i1 %a, i1 %b) {
9 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
10 ; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
11 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
12 ; CHECK-NEXT: ret i1 [[AND]]
14 %wc = call i1 @llvm.experimental.widenable.condition()
15 %lhs = and i1 %b, %wc
16 %and = and i1 %lhs, %a
17 ret i1 %and
21 define i1 @test1b(i1 %a, i1 %b) {
23 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
24 ; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
25 ; CHECK-NEXT: call void @use(i1 [[LHS]])
26 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
27 ; CHECK-NEXT: ret i1 [[AND]]
29 %wc = call i1 @llvm.experimental.widenable.condition()
30 %lhs = and i1 %b, %wc
31 call void @use(i1 %lhs)
32 %and = and i1 %lhs, %a
33 ret i1 %and
37 define i1 @test1c(i1 %a, i1 %b) {
39 ; CHECK-NEXT: call void @use(i1 [[A:%.*]])
40 ; CHECK-NEXT: call void @use(i1 [[B:%.*]])
41 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
42 ; CHECK-NEXT: call void @use(i1 [[WC]])
43 ; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B]]
44 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A]]
45 ; CHECK-NEXT: ret i1 [[AND]]
47 call void @use(i1 %a)
48 call void @use(i1 %b)
49 %wc = call i1 @llvm.experimental.widenable.condition()
50 call void @use(i1 %wc)
51 %lhs = and i1 %b, %wc
52 %and = and i1 %lhs, %a
53 ret i1 %and
56 define i1 @test2(i1 %a, i1 %b) {
58 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
59 ; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
60 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
61 ; CHECK-NEXT: ret i1 [[AND]]
63 %wc = call i1 @llvm.experimental.widenable.condition()
64 %lhs = and i1 %wc, %b
65 %and = and i1 %lhs, %a
66 ret i1 %and
71 define i1 @test3(i1 %a, i1 %b, i1 %c) {
73 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
74 ; CHECK-NEXT: [[LHS:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
75 ; CHECK-NEXT: [[RHS:%.*]] = and i1 [[WC]], [[C:%.*]]
76 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[RHS]]
77 ; CHECK-NEXT: ret i1 [[AND]]
79 %wc = call i1 @llvm.experimental.widenable.condition()
80 %lhs = and i1 %a, %b
81 %rhs = and i1 %c, %wc
82 %and = and i1 %lhs, %rhs
83 ret i1 %and
86 define i1 @test4(i1 %a, i1 %b, i1 %c) {
88 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
89 ; CHECK-NEXT: [[LHS:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
90 ; CHECK-NEXT: [[RHS:%.*]] = and i1 [[WC]], [[C:%.*]]
91 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[RHS]]
92 ; CHECK-NEXT: ret i1 [[AND]]
94 %wc = call i1 @llvm.experimental.widenable.condition()
95 %lhs = and i1 %a, %b
96 %rhs = and i1 %wc, %c
97 %and = and i1 %lhs, %rhs
98 ret i1 %and
101 define i1 @test5(i1 %a, i1 %b) {
103 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
104 ; CHECK-NEXT: ret i1 [[WC]]
106 %wc = call i1 @llvm.experimental.widenable.condition()
107 %and = and i1 %wc, %wc
108 ret i1 %and
111 define i1 @test6(i1 %a, i1 %b) {
113 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
114 ; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
115 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
116 ; CHECK-NEXT: ret i1 [[AND]]
118 %wc = call i1 @llvm.experimental.widenable.condition()
119 %wc2 = call i1 @llvm.experimental.widenable.condition()
120 %and = and i1 %wc, %wc2
121 ret i1 %and
124 define i1 @test7(i1 %a, i1 %b) {
126 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
127 ; CHECK-NEXT: call void @use(i1 [[WC]])
128 ; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
129 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
130 ; CHECK-NEXT: ret i1 [[AND]]
132 %wc = call i1 @llvm.experimental.widenable.condition()
133 call void @use(i1 %wc)
134 %wc2 = call i1 @llvm.experimental.widenable.condition()
135 %and = and i1 %wc, %wc2
136 ret i1 %and
139 define i1 @test8(i1 %a, i1 %b) {
141 ; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
142 ; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
143 ; CHECK-NEXT: call void @use(i1 [[WC2]])
144 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
145 ; CHECK-NEXT: ret i1 [[AND]]
147 %wc = call i1 @llvm.experimental.widenable.condition()
148 %wc2 = call i1 @llvm.experimental.widenable.condition()
149 call void @use(i1 %wc2)
150 %and = and i1 %wc, %wc2
151 ret i1 %and
155 declare void @use(i1)
156 declare i1 @llvm.experimental.widenable.condition()