Lines Matching refs:FPABI

67     FpABI:        [[FPABI=FP_SOFT]]
198 # RUN: llvm-readelf -A %t.fpabi.any | FileCheck %s --check-prefix=FPABI-ANY
199 # RUN: llvm-readobj -A %t.fpabi.any | FileCheck %s --check-prefix=FPABI-ANY
201 # FPABI-ANY: FP ABI: Hard or soft float
204 # RUN: llvm-readelf -A %t.fpabi.double | FileCheck %s --check-prefix=FPABI-DOUBLE
205 # RUN: llvm-readobj -A %t.fpabi.double | FileCheck %s --check-prefix=FPABI-DOUBLE
207 # FPABI-DOUBLE: FP ABI: Hard float (double precision)
210 # RUN: llvm-readelf -A %t.fpabi.single | FileCheck %s --check-prefix=FPABI-SINGLE
211 # RUN: llvm-readobj -A %t.fpabi.single | FileCheck %s --check-prefix=FPABI-SINGLE
213 # FPABI-SINGLE: FP ABI: Hard float (single precision)
216 # RUN: llvm-readelf -A %t.fpabi.soft | FileCheck %s --check-prefix=FPABI-SOFT
217 # RUN: llvm-readobj -A %t.fpabi.soft | FileCheck %s --check-prefix=FPABI-SOFT
219 # FPABI-SOFT: FP ABI: Soft float
222 # RUN: llvm-readelf -A %t.fpabi.old64 | FileCheck %s --check-prefix=FPABI-OLD64
223 # RUN: llvm-readobj -A %t.fpabi.old64 | FileCheck %s --check-prefix=FPABI-OLD64
225 # FPABI-OLD64: FP ABI: Hard float (MIPS32r2 64-bit FPU 12 callee-saved)
228 # RUN: llvm-readelf -A %t.fpabi.xx | FileCheck %s --check-prefix=FPABI-XX
229 # RUN: llvm-readobj -A %t.fpabi.xx | FileCheck %s --check-prefix=FPABI-XX
231 # FPABI-XX: FP ABI: Hard float (32-bit CPU, Any FPU)
234 # RUN: llvm-readelf -A %t.fpabi.fp64 | FileCheck %s --check-prefix=FPABI-FP64
235 # RUN: llvm-readobj -A %t.fpabi.fp64 | FileCheck %s --check-prefix=FPABI-FP64
237 # FPABI-FP64: FP ABI: Hard float (32-bit CPU, 64-bit FPU)
240 # RUN: llvm-readelf -A %t.fpabi.fp64a | FileCheck %s --check-prefix=FPABI-FP64A
241 # RUN: llvm-readobj -A %t.fpabi.fp64a | FileCheck %s --check-prefix=FPABI-FP64A
243 # FPABI-FP64A: FP ABI: Hard float compat (32-bit CPU, 64-bit FPU)
247 # RUN: llvm-readelf -A %t.ases.no | FileCheck %s --check-prefix=FPABI-ASES-NONE-GNU
248 # RUN: llvm-readobj -A %t.ases.no | FileCheck %s --check-prefix=FPABI-ASES-NONE-LLVM
250 # FPABI-ASES-NONE-GNU: ASEs: None
252 # FPABI-ASES-NONE-LLVM:      ASEs [ (0x0)
253 # FPABI-ASES-NONE-LLVM-NEXT: ]
256 # RUN: llvm-readelf -A %t.ases.all | FileCheck %s --check-prefix=FPABI-ASES-ALL-GNU
257 # RUN: llvm-readobj -A %t.ases.all | FileCheck %s --check-prefix=FPABI-ASES-ALL-LLVM
259 # FPABI-ASES-ALL-GNU: ASEs: DSP, DSPR2, Enhanced VA Scheme, MCU, MDMX, MIPS-3D, MT, SmartMIPS, VZ, …
261 # FPABI-ASES-ALL-LLVM:      ASEs [ (0x29FFF)
262 # FPABI-ASES-ALL-LLVM-NEXT:   CRC (0x8000)
263 # FPABI-ASES-ALL-LLVM-NEXT:   DSP (0x1)
264 # FPABI-ASES-ALL-LLVM-NEXT:   DSPR2 (0x2)
265 # FPABI-ASES-ALL-LLVM-NEXT:   Enhanced VA Scheme (0x4)
266 # FPABI-ASES-ALL-LLVM-NEXT:   GINV (0x20000)
267 # FPABI-ASES-ALL-LLVM-NEXT:   MCU (0x8)
268 # FPABI-ASES-ALL-LLVM-NEXT:   MDMX (0x10)
269 # FPABI-ASES-ALL-LLVM-NEXT:   MIPS-3D (0x20)
270 # FPABI-ASES-ALL-LLVM-NEXT:   MIPS16 (0x400)
271 # FPABI-ASES-ALL-LLVM-NEXT:   MSA (0x200)
272 # FPABI-ASES-ALL-LLVM-NEXT:   MT (0x40)
273 # FPABI-ASES-ALL-LLVM-NEXT:   SmartMIPS (0x80)
274 # FPABI-ASES-ALL-LLVM-NEXT:   VZ (0x100)
275 # FPABI-ASES-ALL-LLVM-NEXT:   XPA (0x1000)
276 # FPABI-ASES-ALL-LLVM-NEXT:   microMIPS (0x800)
277 # FPABI-ASES-ALL-LLVM-NEXT: ]