Lines Matching refs:DMA

5 // DMA generation at inner levels easily - since the DMA generation would
20   // First DMA buffer.
23   // Tag for first DMA.
25   // First DMA transfer.
28   // Second DMA buffer.
30   // Tag for second DMA.
32   // Second DMA transfer.
68 // INCOMING DMA for B
71 // INCOMING DMA for A.
74 // INCOMING DMA for C.
98 // OUTGOING DMA for C.
144 // A loop nest with a modulo 2 access. A strided DMA is not needed here a 1x2
178 // DMA on tiled loop nest. This also tests the case where the bounds are
187 // Strided DMA here: 32 x 32 tile in a 256 x 1024 memref.
211   // No strided DMA needed here.
253 // memref size; so the DMA buffer is the entire 100x100.
276       // If this loop nest isn't tiled, the access requires a non-constant DMA
296         // DMA with nested striding (or emulating with loop around strided DMA)
549 // Since the fast memory size is 4 KB, DMA generation will happen right under
583 // %arg0 and %arg1. So, its DMA can be hoisted one level up and placed under