Lines Matching refs:Def
294 const MachineInstr *Def; member in __anoncaae1f320111::ValueTracker
354 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg), in ValueTracker()
357 Def = MRI.getVRegDef(Reg); in ValueTracker()
373 : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg), in ValueTracker()
375 assert(DefIdx < Def->getDesc().getNumDefs() && in ValueTracker()
376 Def->getOperand(DefIdx).isReg() && "Invalid definition"); in ValueTracker()
377 Reg = Def->getOperand(DefIdx).getReg(); in ValueTracker()
820 TargetInstrInfo::RegSubRegPair Def, in getNewSource() argument
824 TargetInstrInfo::RegSubRegPair LookupSrc(Def.Reg, Def.SubReg); in getNewSource()
873 RewriteSource(TargetInstrInfo::RegSubRegPair Def, in RewriteSource() argument
928 RewriteSource(TargetInstrInfo::RegSubRegPair Def, in RewriteSource() argument
930 assert(!TargetRegisterInfo::isPhysicalRegister(Def.Reg) && in RewriteSource()
935 getNewSource(&MRI, &TII, Def, RewriteMap); in RewriteSource()
938 const TargetRegisterClass *DefRC = MRI.getRegClass(Def.Reg); in RewriteSource()
946 NewCopy->getOperand(0).setSubReg(Def.SubReg); in RewriteSource()
947 if (Def.SubReg) in RewriteSource()
953 MRI.replaceRegWith(Def.Reg, NewVR); in RewriteSource()
1271 TargetInstrInfo::RegSubRegPair Def(CopyDefReg, CopyDefSubReg); in optimizeUncoalescableCopy() local
1272 if (!findNextSource(Def.Reg, Def.SubReg, RewriteMap)) in optimizeUncoalescableCopy()
1275 RewritePairs.push_back(Def); in optimizeUncoalescableCopy()
1279 for (const auto &Def : RewritePairs) { in optimizeUncoalescableCopy() local
1281 MachineInstr *NewCopy = CpyRewriter->RewriteSource(Def, RewriteMap); in optimizeUncoalescableCopy()
1540 const auto &Def = NAPhysToVirtMIs.find(Reg); in runOnMachineFunction() local
1541 if (Def != NAPhysToVirtMIs.end()) { in runOnMachineFunction()
1546 NAPhysToVirtMIs.erase(Def); in runOnMachineFunction()
1552 unsigned Def = RegMI.first; in runOnMachineFunction() local
1553 if (MachineOperand::clobbersPhysReg(RegMask, Def)) { in runOnMachineFunction()
1556 NAPhysToVirtMIs.erase(Def); in runOnMachineFunction()
1667 assert(Def->isCopy() && "Invalid definition"); in getNextSourceFromCopy()
1670 assert(Def->getNumOperands() == 2 && "Invalid number of operands"); in getNextSourceFromCopy()
1672 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1677 const MachineOperand &Src = Def->getOperand(1); in getNextSourceFromCopy()
1682 assert(Def->isBitcast() && "Invalid definition"); in getNextSourceFromBitcast()
1685 if (Def->hasUnmodeledSideEffects()) in getNextSourceFromBitcast()
1689 if (Def->getDesc().getNumDefs() != 1) in getNextSourceFromBitcast()
1691 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1696 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast()
1699 const MachineOperand &MO = Def->getOperand(OpIdx); in getNextSourceFromBitcast()
1711 const MachineOperand &Src = Def->getOperand(SrcIdx); in getNextSourceFromBitcast()
1716 assert((Def->isRegSequence() || Def->isRegSequenceLike()) && in getNextSourceFromRegSequence()
1719 if (Def->getOperand(DefIdx).getSubReg()) in getNextSourceFromRegSequence()
1742 if (!TII->getRegSequenceInputs(*Def, DefIdx, RegSeqInputRegs)) in getNextSourceFromRegSequence()
1765 assert((Def->isInsertSubreg() || Def->isInsertSubregLike()) && in getNextSourceFromInsertSubreg()
1768 if (Def->getOperand(DefIdx).getSubReg()) in getNextSourceFromInsertSubreg()
1781 if (!TII->getInsertSubregInputs(*Def, DefIdx, BaseReg, InsertedReg)) in getNextSourceFromInsertSubreg()
1797 const MachineOperand &MODef = Def->getOperand(DefIdx); in getNextSourceFromInsertSubreg()
1818 assert((Def->isExtractSubreg() || in getNextSourceFromExtractSubreg()
1819 Def->isExtractSubregLike()) && "Invalid definition"); in getNextSourceFromExtractSubreg()
1834 if (!TII->getExtractSubregInputs(*Def, DefIdx, ExtractSubregInputReg)) in getNextSourceFromExtractSubreg()
1847 assert(Def->isSubregToReg() && "Invalid definition"); in getNextSourceFromSubregToReg()
1855 if (DefSubReg != Def->getOperand(3).getImm()) in getNextSourceFromSubregToReg()
1859 if (Def->getOperand(2).getSubReg()) in getNextSourceFromSubregToReg()
1862 return ValueTrackerResult(Def->getOperand(2).getReg(), in getNextSourceFromSubregToReg()
1863 Def->getOperand(3).getImm()); in getNextSourceFromSubregToReg()
1868 assert(Def->isPHI() && "Invalid definition"); in getNextSourceFromPHI()
1873 if (Def->getOperand(0).getSubReg() != DefSubReg) in getNextSourceFromPHI()
1877 for (unsigned i = 1, e = Def->getNumOperands(); i < e; i += 2) { in getNextSourceFromPHI()
1878 auto &MO = Def->getOperand(i); in getNextSourceFromPHI()
1887 assert(Def && "This method needs a valid definition"); in getNextSourceImpl()
1889 assert(((Def->getOperand(DefIdx).isDef() && in getNextSourceImpl()
1890 (DefIdx < Def->getDesc().getNumDefs() || in getNextSourceImpl()
1891 Def->getDesc().isVariadic())) || in getNextSourceImpl()
1892 Def->getOperand(DefIdx).isImplicit()) && in getNextSourceImpl()
1894 if (Def->isCopy()) in getNextSourceImpl()
1896 if (Def->isBitcast()) in getNextSourceImpl()
1902 if (Def->isRegSequence() || Def->isRegSequenceLike()) in getNextSourceImpl()
1904 if (Def->isInsertSubreg() || Def->isInsertSubregLike()) in getNextSourceImpl()
1906 if (Def->isExtractSubreg() || Def->isExtractSubregLike()) in getNextSourceImpl()
1908 if (Def->isSubregToReg()) in getNextSourceImpl()
1910 if (Def->isPHI()) in getNextSourceImpl()
1918 if (!Def) in getNextSource()
1931 Res.setInst(Def); in getNextSource()
1936 Def = MRI.getVRegDef(Reg); in getNextSource()
1945 Def = nullptr; in getNextSource()