Lines Matching refs:PhysReg
72 unsigned PhysReg; // Currently held here. member
77 : LastUse(nullptr), VirtReg(v), PhysReg(0), LastOpNum(0), Dirty(false){} in LiveReg()
123 void markRegUsedInInstr(unsigned PhysReg) { in markRegUsedInInstr() argument
124 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) in markRegUsedInInstr()
129 bool isRegUsedInInstr(unsigned PhysReg) const { in isRegUsedInInstr()
130 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) in isRegUsedInInstr()
181 void definePhysReg(MachineInstr &MI, unsigned PhysReg, RegState NewState);
182 unsigned calcSpillCost(unsigned PhysReg) const;
183 void assignVirtToPhysReg(LiveReg&, unsigned PhysReg);
190 LiveRegMap::iterator assignVirtToPhysReg(unsigned VReg, unsigned PhysReg);
198 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
241 if (MO.getReg() == LR.PhysReg) in addKillFlag()
244 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true); in addKillFlag()
251 assert(PhysRegState[LRI->PhysReg] == LRI->VirtReg && in killVirtReg()
253 PhysRegState[LRI->PhysReg] = regFree; in killVirtReg()
282 assert(PhysRegState[LR.PhysReg] == LRI->VirtReg && "Broken RegState mapping"); in spillVirtReg()
290 << " in " << PrintReg(LR.PhysReg, TRI)); in spillVirtReg()
294 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI); in spillVirtReg()
349 unsigned PhysReg = MO.getReg(); in usePhysReg() local
350 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && in usePhysReg()
357 markRegUsedInInstr(PhysReg); in usePhysReg()
358 switch (PhysRegState[PhysReg]) { in usePhysReg()
362 PhysRegState[PhysReg] = regFree; in usePhysReg()
374 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in usePhysReg()
389 assert((TRI->isSuperRegister(PhysReg, Alias) || in usePhysReg()
390 TRI->isSuperRegister(Alias, PhysReg)) && in usePhysReg()
394 if (TRI->isSuperRegister(PhysReg, Alias)) { in usePhysReg()
409 PhysRegState[PhysReg] = regFree; in usePhysReg()
416 void RAFast::definePhysReg(MachineInstr &MI, unsigned PhysReg, in definePhysReg() argument
418 markRegUsedInInstr(PhysReg); in definePhysReg()
419 switch (unsigned VirtReg = PhysRegState[PhysReg]) { in definePhysReg()
427 PhysRegState[PhysReg] = NewState; in definePhysReg()
432 PhysRegState[PhysReg] = NewState; in definePhysReg()
433 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in definePhysReg()
444 if (TRI->isSuperRegister(PhysReg, Alias)) in definePhysReg()
457 unsigned RAFast::calcSpillCost(unsigned PhysReg) const { in calcSpillCost()
458 if (isRegUsedInInstr(PhysReg)) { in calcSpillCost()
459 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " is already used in instr.\n"); in calcSpillCost()
462 switch (unsigned VirtReg = PhysRegState[PhysReg]) { in calcSpillCost()
469 << PrintReg(PhysReg, TRI) << " is reserved already.\n"); in calcSpillCost()
479 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " is disabled.\n"); in calcSpillCost()
481 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in calcSpillCost()
507 void RAFast::assignVirtToPhysReg(LiveReg &LR, unsigned PhysReg) { in assignVirtToPhysReg() argument
509 << PrintReg(PhysReg, TRI) << "\n"); in assignVirtToPhysReg()
510 PhysRegState[PhysReg] = LR.VirtReg; in assignVirtToPhysReg()
511 assert(!LR.PhysReg && "Already assigned a physreg"); in assignVirtToPhysReg()
512 LR.PhysReg = PhysReg; in assignVirtToPhysReg()
516 RAFast::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { in assignVirtToPhysReg() argument
519 assignVirtToPhysReg(*LRI, PhysReg); in assignVirtToPhysReg()
556 unsigned PhysReg = *I; in allocVirtReg() local
557 if (PhysRegState[PhysReg] == regFree && !isRegUsedInInstr(PhysReg)) { in allocVirtReg()
558 assignVirtToPhysReg(*LRI, PhysReg); in allocVirtReg()
623 assert(LRI->PhysReg && "Register not assigned"); in defineVirtReg()
627 markRegUsedInInstr(LRI->PhysReg); in defineVirtReg()
647 << PrintReg(LRI->PhysReg, TRI) << "\n"); in reloadVirtReg()
648 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI); in reloadVirtReg()
675 assert(LRI->PhysReg && "Register not assigned"); in reloadVirtReg()
678 markRegUsedInInstr(LRI->PhysReg); in reloadVirtReg()
685 bool RAFast::setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) { in setPhysReg() argument
689 MO.setReg(PhysReg); in setPhysReg()
694 MO.setReg(PhysReg ? TRI->getSubReg(PhysReg, MO.getSubReg()) : 0); in setPhysReg()
700 MI->addRegisterKilled(PhysReg, TRI, true); in setPhysReg()
707 MI->addRegisterDefined(PhysReg, TRI); in setPhysReg()
759 unsigned PhysReg = LRI->PhysReg; in handleThroughOperands() local
760 setPhysReg(MI, i, PhysReg); in handleThroughOperands()
768 PartialDefs.push_back(LRI->PhysReg); in handleThroughOperands()
782 unsigned PhysReg = LRI->PhysReg; in handleThroughOperands() local
783 if (setPhysReg(MI, i, PhysReg)) in handleThroughOperands()
814 if (MRI->isAllocatable(LI.PhysReg)) in AllocateBasicBlock()
815 definePhysReg(*MII, LI.PhysReg, regReserved); in AllocateBasicBlock()
841 assert(I->PhysReg == Reg && "Bad inverse map"); in AllocateBasicBlock()
852 assert(TargetRegisterInfo::isPhysicalRegister(i->PhysReg) && in AllocateBasicBlock()
854 assert(PhysRegState[i->PhysReg] == i->VirtReg && "Bad inverse map"); in AllocateBasicBlock()
870 setPhysReg(MI, i, LRI->PhysReg); in AllocateBasicBlock()
992 unsigned PhysReg = LRI->PhysReg; in AllocateBasicBlock() local
993 CopySrc = (CopySrc == Reg || CopySrc == PhysReg) ? PhysReg : 0; in AllocateBasicBlock()
994 if (setPhysReg(MI, i, PhysReg)) in AllocateBasicBlock()
1045 unsigned PhysReg = LRI->PhysReg; in AllocateBasicBlock() local
1046 if (setPhysReg(MI, i, PhysReg)) { in AllocateBasicBlock()
1050 CopyDst = (CopyDst == Reg || CopyDst == PhysReg) ? PhysReg : 0; in AllocateBasicBlock()