315   SrcIdx = DstIdx = 0;  in setRegisters()
362                                          SrcIdx, DstIdx);  in setRegisters()
367       SrcIdx = DstSub;  in setRegisters()
384     if (DstIdx && !SrcIdx) {  in setRegisters()
386       std::swap(SrcIdx, DstIdx);  in setRegisters()
405   std::swap(SrcIdx, DstIdx);  in flip()
429     assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state.");  in isCoalescable()
443     return TRI.composeSubRegIndices(SrcIdx, SrcSub) ==  in isCoalescable()
885   unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx();  in reMaterializeTrivialDef()  local
927   if (SrcIdx && DstIdx)  in reMaterializeTrivialDef()
956   TII->reMaterialize(*MBB, MII, DstReg, SrcIdx, *DefMI, *TRI);  in reMaterializeTrivialDef()
969       assert(SrcIdx == 0 && CP.isFlipped()  in reMaterializeTrivialDef()
1355     unsigned SrcIdx = CP.getSrcIdx();  in joinCopy()  local
1358       std::swap(SrcIdx, DstIdx);  in joinCopy()
1361     if (!TRI->shouldCoalesce(CopyMI, SrcRC, SrcIdx, DstRC, DstIdx,  in joinCopy()
2686     unsigned SrcIdx = CP.getSrcIdx();  in joinVirtRegs()  local
2688       LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask()  in joinVirtRegs()
2689                                      : TRI->getSubRegIndexLaneMask(SrcIdx);  in joinVirtRegs()
2694         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);  in joinVirtRegs()