Lines Matching refs:ZeroReg
2851 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine() argument
2870 if (MI->getOperand(3).getReg() != ZeroReg) in canCombine()
2880 unsigned MulOpc, unsigned ZeroReg) { in canCombineWithMUL() argument
2881 return canCombine(MBB, MO, MulOpc, ZeroReg, true); in canCombineWithMUL()
3438 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
3443 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
3450 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
3466 .addReg(ZeroReg) in genAlternativeCodeSequence()
3482 unsigned SubOpc, ZeroReg; in genAlternativeCodeSequence() local
3486 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
3492 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
3500 .addReg(ZeroReg) in genAlternativeCodeSequence()
3530 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
3535 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
3542 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
3557 .addReg(ZeroReg) in genAlternativeCodeSequence()