49 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) {  in getEquivalentMemType()
58 EVT AMDGPUTargetLowering::getEquivalentBitType(LLVMContext &Ctx, EVT VT) {  in getEquivalentBitType()
66 AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM,  in AMDGPUTargetLowering()  function in AMDGPUTargetLowering
491 MVT AMDGPUTargetLowering::getVectorIdxTy(const DataLayout &) const {  in getVectorIdxTy()
495 bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const {  in isSelectSupported()
501 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {  in isFPImmLegal()
507 bool AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const {  in ShouldShrinkFPConstant()
512 bool AMDGPUTargetLowering::shouldReduceLoadWidth(SDNode *N,  in shouldReduceLoadWidth()
535 bool AMDGPUTargetLowering::isLoadBitCastBeneficial(EVT LoadTy,  in isLoadBitCastBeneficial()
554 bool AMDGPUTargetLowering::isCheapToSpeculateCttz() const {  in isCheapToSpeculateCttz()
558 bool AMDGPUTargetLowering::isCheapToSpeculateCtlz() const {  in isCheapToSpeculateCtlz()
566 bool AMDGPUTargetLowering::isFAbsFree(EVT VT) const {  in isFAbsFree()
571 bool AMDGPUTargetLowering::isFNegFree(EVT VT) const {  in isFNegFree()
576 bool AMDGPUTargetLowering:: storeOfVectorConstantIsCheap(EVT MemVT,  in storeOfVectorConstantIsCheap()
582 bool AMDGPUTargetLowering::aggressivelyPreferBuildVectorSources(EVT VecVT) const {  in aggressivelyPreferBuildVectorSources()
594 bool AMDGPUTargetLowering::isTruncateFree(EVT Source, EVT Dest) const {  in isTruncateFree()
599 bool AMDGPUTargetLowering::isTruncateFree(Type *Source, Type *Dest) const {  in isTruncateFree()
605 bool AMDGPUTargetLowering::isZExtFree(Type *Src, Type *Dest) const {  in isZExtFree()
612 bool AMDGPUTargetLowering::isZExtFree(EVT Src, EVT Dest) const {  in isZExtFree()
620 bool AMDGPUTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {  in isZExtFree()
624 bool AMDGPUTargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const {  in isNarrowingProfitable()
638 void AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State,  in AnalyzeFormalArguments()
644 void AMDGPUTargetLowering::AnalyzeReturn(CCState &State,  in AnalyzeReturn()
651 AMDGPUTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,  in LowerReturn()
663 SDValue AMDGPUTargetLowering::LowerCall(CallLoweringInfo &CLI,  in LowerCall()
687 SDValue AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,  in LowerDYNAMIC_STACKALLOC()
698 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op,  in LowerOperation()
731 void AMDGPUTargetLowering::ReplaceNodeResults(SDNode *N,  in ReplaceNodeResults()
758 SDValue AMDGPUTargetLowering::LowerConstantInitializer(const Constant* Init,  in LowerConstantInitializer()
844 SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,  in LowerGlobalAddress()
895 SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op,  in LowerCONCAT_VECTORS()
905 SDValue AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op,  in LowerEXTRACT_SUBVECTOR()
917 SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,  in LowerINTRINSIC_WO_CHAIN()
951 SDValue AMDGPUTargetLowering::CombineFMinMaxLegacy(const SDLoc &DL, EVT VT,  in CombineFMinMaxLegacy()
1028 AMDGPUTargetLowering::split64BitValue(SDValue Op, SelectionDAG &DAG) const {  in split64BitValue()
1042 SDValue AMDGPUTargetLowering::getLoHalf64(SDValue Op, SelectionDAG &DAG) const {  in getLoHalf64()
1050 SDValue AMDGPUTargetLowering::getHiHalf64(SDValue Op, SelectionDAG &DAG) const {  in getHiHalf64()
1058 SDValue AMDGPUTargetLowering::SplitVectorLoad(const SDValue Op,  in SplitVectorLoad()
1116 SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op,  in MergeVectorStore()
1174 SDValue AMDGPUTargetLowering::SplitVectorStore(SDValue Op,  in SplitVectorStore()
1231 SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG,  in LowerDIVREM24()
1334 void AMDGPUTargetLowering::LowerUDIVREM64(SDValue Op,  in LowerUDIVREM64()
1412 SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op,  in LowerUDIVREM()
1527 SDValue AMDGPUTargetLowering::LowerSDIVREM(SDValue Op,  in LowerSDIVREM()
1588 SDValue AMDGPUTargetLowering::LowerFREM(SDValue Op, SelectionDAG &DAG) const {  in LowerFREM()
1603 SDValue AMDGPUTargetLowering::LowerFCEIL(SDValue Op, SelectionDAG &DAG) const {  in LowerFCEIL()
1643 SDValue AMDGPUTargetLowering::LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const {  in LowerFTRUNC()
1692 SDValue AMDGPUTargetLowering::LowerFRINT(SDValue Op, SelectionDAG &DAG) const {  in LowerFRINT()
1719 SDValue AMDGPUTargetLowering::LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const {  in LowerFNEARBYINT()
1727 SDValue AMDGPUTargetLowering::LowerFROUND32(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND32()
1755 SDValue AMDGPUTargetLowering::LowerFROUND64(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND64()
1812 SDValue AMDGPUTargetLowering::LowerFROUND(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND()
1824 SDValue AMDGPUTargetLowering::LowerFFLOOR(SDValue Op, SelectionDAG &DAG) const {  in LowerFFLOOR()
1849 SDValue AMDGPUTargetLowering::LowerCTLZ(SDValue Op, SelectionDAG &DAG) const {  in LowerCTLZ()
1903 SDValue AMDGPUTargetLowering::LowerINT_TO_FP32(SDValue Op, SelectionDAG &DAG,  in LowerINT_TO_FP32()
1988 SDValue AMDGPUTargetLowering::LowerINT_TO_FP64(SDValue Op, SelectionDAG &DAG,  in LowerINT_TO_FP64()
2011 SDValue AMDGPUTargetLowering::LowerUINT_TO_FP(SDValue Op,  in LowerUINT_TO_FP()
2026 SDValue AMDGPUTargetLowering::LowerSINT_TO_FP(SDValue Op,  in LowerSINT_TO_FP()
2041 SDValue AMDGPUTargetLowering::LowerFP64_TO_INT(SDValue Op, SelectionDAG &DAG,  in LowerFP64_TO_INT()
2070 SDValue AMDGPUTargetLowering::LowerFP_TO_SINT(SDValue Op,  in LowerFP_TO_SINT()
2080 SDValue AMDGPUTargetLowering::LowerFP_TO_UINT(SDValue Op,  in LowerFP_TO_UINT()
2090 SDValue AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op,  in LowerSIGN_EXTEND_INREG()
2172 bool AMDGPUTargetLowering::shouldCombineMemoryType(EVT VT) const {  in shouldCombineMemoryType()
2193 SDValue AMDGPUTargetLowering::performLoadCombine(SDNode *N,  in performLoadCombine()
2241 SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N,  in performStoreCombine()
2291 SDValue AMDGPUTargetLowering::performAndCombine(SDNode *N,  in performAndCombine()
2332 SDValue AMDGPUTargetLowering::performShlCombine(SDNode *N,  in performShlCombine()
2366 SDValue AMDGPUTargetLowering::performSraCombine(SDNode *N,  in performSraCombine()
2401 SDValue AMDGPUTargetLowering::performSrlCombine(SDNode *N,  in performSrlCombine()
2436 SDValue AMDGPUTargetLowering::performMulCombine(SDNode *N,  in performMulCombine()
2505 SDValue AMDGPUTargetLowering::performCtlzCombine(const SDLoc &SL, SDValue Cond,  in performCtlzCombine()
2535 SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,  in performSelectCombine()
2561 SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,  in PerformDAGCombine()
2733 void AMDGPUTargetLowering::getOriginalFunctionArgs(  in getOriginalFunctionArgs()
2765 SDValue AMDGPUTargetLowering::CreateLiveInRegister(SelectionDAG &DAG,  in CreateLiveInRegister()
2780 uint32_t AMDGPUTargetLowering::getImplicitParameterOffset(  in getImplicitParameterOffset()
2794 const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const {  in getTargetNodeName()
2877 SDValue AMDGPUTargetLowering::getRsqrtEstimate(SDValue Operand,  in getRsqrtEstimate()
2895 SDValue AMDGPUTargetLowering::getRecipEstimate(SDValue Operand,  in getRecipEstimate()
2917 void AMDGPUTargetLowering::computeKnownBitsForTargetNode(  in computeKnownBitsForTargetNode()
2956 unsigned AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(  in ComputeNumSignBitsForTargetNode()