Lines Matching refs:RegList
31 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAPCS() local
34 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
49 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
206 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
209 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
210 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
215 while (RegIdx % RegAlign != 0 && RegIdx < RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
216 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
221 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
224 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
227 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
234 unsigned RegResult = State.AllocateRegBlock(RegList, PendingMembers.size()); in CC_ARM_AAPCS_Custom_Aggregate()
251 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
253 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
256 It.convertToReg(State.AllocateReg(RegList[RegIdx++])); in CC_ARM_AAPCS_Custom_Aggregate()
263 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
266 for (auto Reg : RegList) in CC_ARM_AAPCS_Custom_Aggregate()