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Lines Matching refs:Reg0

1861   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);  in SelectVLD()  local
1881 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVLD()
1884 Ops.push_back(Reg0); in SelectVLD()
1897 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
1910 Ops.push_back(Reg0); in SelectVLD()
1914 Ops.push_back(Reg0); in SelectVLD()
1991 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2036 Ops.push_back(Reg0); in SelectVST()
2040 Ops.push_back(Reg0); in SelectVST()
2065 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2080 Ops.push_back(Reg0); in SelectVST()
2084 Ops.push_back(Reg0); in SelectVST()
2156 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2163 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVLDSTLane()
2187 Ops.push_back(Reg0); in SelectVLDSTLane()
2254 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
2268 Ops.push_back(Reg0); in SelectVLDDup()
2271 Ops.push_back(Reg0); in SelectVLDDup()
2356 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2364 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
2375 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
2383 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2403 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2407 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2424 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2428 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2444 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
2448 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
2776 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
2778 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
2782 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
2783 Reg0 }; in Select()
2795 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
2797 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
2801 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
2802 Reg0 }; in Select()
4251 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
4274 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
4289 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()