Lines Matching refs:Rd
298 bits<4> Rd;
301 let Inst{11-8} = Rd;
311 bits<4> Rd;
315 let Inst{11-8} = Rd;
337 bits<4> Rd;
340 let Inst{11-8} = Rd;
350 bits<4> Rd;
353 let Inst{11-8} = Rd;
376 bits<4> Rd;
379 let Inst{11-8} = Rd;
386 bits<4> Rd;
389 let Inst{11-8} = Rd;
407 bits<4> Rd;
411 let Inst{11-8} = Rd;
421 bits<4> Rd;
425 let Inst{11-8} = Rd;
435 bits<4> Rd;
439 let Inst{11-8} = Rd;
448 bits<4> Rd;
452 let Inst{11-8} = Rd;
461 bits<4> Rd;
465 let Inst{11-8} = Rd;
473 bits<4> Rd;
477 let Inst{11-8} = Rd;
485 bits<4> Rd;
489 let Inst{11-8} = Rd;
497 bits<4> Rd;
501 let Inst{11-8} = Rd;
512 bits<4> Rd;
516 let Inst{11-8} = Rd;
527 bits<4> Rd;
534 let Inst{11-8} = Rd;
583 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), iii,
584 opc, "\t$Rd, $Rn, $imm",
585 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_imm:$imm))]>,
593 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), iir,
594 opc, !strconcat(wide, "\t$Rd, $Rn, $Rm"),
595 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>,
607 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm), iis,
608 opc, !strconcat(wide, "\t$Rd, $Rn, $ShiftedRm"),
609 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm))]>,
638 def : t2InstAlias<!strconcat(opc, "${s}${p}.w", " $Rd, $Rn, $imm"),
639 (!cast<Instruction>(NAME#"ri") rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p,
642 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $Rm"),
643 (!cast<Instruction>(NAME#"rr") rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p,
645 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $shift"),
646 (!cast<Instruction>(NAME#"rs") rGPR:$Rd, rGPR:$Rn, t2_so_reg:$shift,
667 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi,
668 opc, ".w\t$Rd, $Rn, $imm",
669 [(set rGPR:$Rd, (opnode t2_so_imm:$imm, rGPR:$Rn))]>,
678 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr,
679 opc, "\t$Rd, $Rn, $Rm",
691 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
692 IIC_iALUsir, opc, "\t$Rd, $Rn, $ShiftedRm",
693 [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm, rGPR:$Rn))]>,
711 def ri : t2PseudoInst<(outs rGPR:$Rd),
714 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
718 def rr : t2PseudoInst<(outs rGPR:$Rd), (ins GPRnopc:$Rn, rGPR:$Rm, pred:$p),
720 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
726 def rs : t2PseudoInst<(outs rGPR:$Rd),
729 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
740 def ri : t2PseudoInst<(outs rGPR:$Rd),
743 [(set rGPR:$Rd, CPSR, (opnode t2_so_imm:$imm,
747 def rs : t2PseudoInst<(outs rGPR:$Rd),
750 [(set rGPR:$Rd, CPSR, (opnode t2_so_reg:$ShiftedRm,
765 (outs GPRnopc:$Rd), (ins GPRnopc:$Rn, t2_so_imm:$imm), IIC_iALUi,
766 opc, ".w\t$Rd, $Rn, $imm",
767 [(set GPRnopc:$Rd, (opnode GPRnopc:$Rn, t2_so_imm:$imm))]>,
778 (outs GPRnopc:$Rd), (ins GPR:$Rn, imm0_4095:$imm), IIC_iALUi,
779 !strconcat(opc, "w"), "\t$Rd, $Rn, $imm",
780 [(set GPRnopc:$Rd, (opnode GPR:$Rn, imm0_4095:$imm))]>,
782 bits<4> Rd;
793 let Inst{11-8} = Rd;
797 def rr : T2sThreeReg<(outs GPRnopc:$Rd), (ins GPRnopc:$Rn, rGPR:$Rm),
798 IIC_iALUr, opc, ".w\t$Rd, $Rn, $Rm",
799 [(set GPRnopc:$Rd, (opnode GPRnopc:$Rn, rGPR:$Rm))]>,
812 (outs GPRnopc:$Rd), (ins GPRnopc:$Rn, t2_so_reg:$ShiftedRm),
813 IIC_iALUsi, opc, ".w\t$Rd, $Rn, $ShiftedRm",
814 [(set GPRnopc:$Rd, (opnode GPRnopc:$Rn, t2_so_reg:$ShiftedRm))]>,
830 def ri : T2sTwoRegImm<(outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm),
831 IIC_iALUi, opc, "\t$Rd, $Rn, $imm",
832 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, t2_so_imm:$imm, CPSR))]>,
840 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr,
841 opc, ".w\t$Rd, $Rn, $Rm",
842 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, rGPR:$Rm, CPSR))]>,
854 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
855 IIC_iALUsi, opc, ".w\t$Rd, $Rn, $ShiftedRm",
856 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm, CPSR))]>,
870 (outs rGPR:$Rd), (ins rGPR:$Rm, ty:$imm), IIC_iMOVsi,
871 opc, ".w\t$Rd, $Rm, $imm",
872 [(set rGPR:$Rd, (opnode rGPR:$Rm, (i32 ty:$imm)))]>,
881 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMOVsr,
882 opc, ".w\t$Rd, $Rn, $Rm",
883 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>,
901 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $imm"),
902 (!cast<Instruction>(NAME#"ri") rGPR:$Rd, rGPR:$Rn, ty:$imm, pred:$p,
904 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $Rm"),
905 (!cast<Instruction>(NAME#"rr") rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p,
934 let Inst{11-8} = 0b1111; // Rd
946 let Inst{11-8} = 0b1111; // Rd
960 let Inst{11-8} = 0b1111; // Rd
1124 : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot), IIC_iEXTr,
1125 opc, ".w\t$Rd, $Rm$rot",
1126 [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
1141 : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot),
1142 IIC_iEXTr, opc, "\t$Rd, $Rm$rot",
1143 [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
1158 : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot), IIC_iEXTr,
1159 opc, "\t$Rd, $Rm$rot", []>,
1174 : T2ThreeReg<(outs rGPR:$Rd),
1176 IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm$rot",
1177 [(set rGPR:$Rd, (opnode rGPR:$Rn, (rotr rGPR:$Rm,rot_imm:$rot)))]>,
1189 : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm,rot_imm:$rot),
1190 IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm$rot", []>,
1212 bits<4> Rd;
1215 let Inst{11-8} = Rd;
1223 def t2ADR : T2PCOneRegImm<(outs rGPR:$Rd),
1225 IIC_iALUi, "adr{$p}.w\t$Rd, $addr", []>,
1235 bits<4> Rd;
1237 let Inst{11-8} = Rd;
1248 def t2LEApcrel : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p),
1251 def t2LEApcrelJT : t2PseudoInst<(outs rGPR:$Rd),
1863 def t2MOVr : T2sTwoReg<(outs GPRnopc:$Rd), (ins GPR:$Rm), IIC_iMOVr,
1864 "mov", ".w\t$Rd, $Rm", []>, Sched<[WriteALU]> {
1872 def : t2InstAlias<"mov${p}.w $Rd, $Rm", (t2MOVr GPRnopc:$Rd, GPR:$Rm,
1874 def : t2InstAlias<"movs${p}.w $Rd, $Rm", (t2MOVr GPRnopc:$Rd, GPR:$Rm,
1876 def : t2InstAlias<"movs${p} $Rd, $Rm", (t2MOVr GPRnopc:$Rd, GPR:$Rm,
1882 def t2MOVi : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), IIC_iMOVi,
1883 "mov", ".w\t$Rd, $imm",
1884 [(set rGPR:$Rd, t2_so_imm:$imm)]>, Sched<[WriteALU]> {
1894 def : t2InstAlias<"movs${p}.w $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1896 def : t2InstAlias<"movs${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1899 def : t2InstAlias<"mov${p}.w $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1901 def : t2InstAlias<"mov${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1905 def t2MOVi16 : T2I<(outs rGPR:$Rd), (ins imm0_65535_expr:$imm), IIC_iMOVi,
1906 "movw", "\t$Rd, $imm",
1907 [(set rGPR:$Rd, imm0_65535:$imm)]>, Sched<[WriteALU]>,
1915 bits<4> Rd;
1918 let Inst{11-8} = Rd;
1926 def : InstAlias<"mov${p} $Rd, $imm",
1927 (t2MOVi16 rGPR:$Rd, imm256_65535_expr:$imm, pred:$p), 0>,
1930 def t2MOVi16_ga_pcrel : PseudoInst<(outs rGPR:$Rd),
1933 let Constraints = "$src = $Rd" in {
1934 def t2MOVTi16 : T2I<(outs rGPR:$Rd),
1936 "movt", "\t$Rd, $imm",
1937 [(set rGPR:$Rd,
1947 bits<4> Rd;
1950 let Inst{11-8} = Rd;
1958 def t2MOVTi16_ga_pcrel : PseudoInst<(outs rGPR:$Rd),
2098 def t2SEL : T2ThreeReg<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
2099 NoItinerary, "sel", "\t$Rd, $Rn, $Rm", []>,
2115 string asm = "\t$Rd, $Rn, $Rm">
2116 : T2I<(outs rGPR:$Rd), iops, NoItinerary, opc, asm, pat>,
2124 bits<4> Rd;
2128 let Inst{11-8} = Rd;
2136 [(set rGPR:$Rd, (int_arm_qadd rGPR:$Rn, rGPR:$Rm))],
2137 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2142 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2144 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2147 [(set rGPR:$Rd, (int_arm_qsub rGPR:$Rn, rGPR:$Rm))],
2148 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2212 def t2USAD8 : T2ThreeReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd),
2214 NoItinerary, "usad8", "\t$Rd, $Rn, $Rm", []>,
2218 def t2USADA8 : T2FourReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd),
2220 "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>,
2227 bits<4> Rd;
2232 let Inst{11-8} = Rd;
2241 (outs rGPR:$Rd),
2243 NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh", []> {
2252 (outs rGPR:$Rd), (ins imm1_16:$sat_imm, rGPR:$Rn), NoItinerary,
2253 "ssat16", "\t$Rd, $sat_imm, $Rn", []>,
2266 (outs rGPR:$Rd),
2268 NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh", []> {
2275 def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins imm0_15:$sat_imm, rGPR:$Rn),
2277 "usat16", "\t$Rd, $sat_imm, $Rn", []>,
2307 def t2RRX : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi,
2308 "rrx", "\t$Rd, $Rm",
2309 [(set rGPR:$Rd, (ARMrrx rGPR:$Rm))]>, Sched<[WriteALU]> {
2321 (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi,
2322 "lsrs", ".w\t$Rd, $Rm, #1",
2323 [(set rGPR:$Rd, (ARMsrl_flag rGPR:$Rm))]>,
2336 (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi,
2337 "asrs", ".w\t$Rd, $Rm, #1",
2338 [(set rGPR:$Rd, (ARMsra_flag rGPR:$Rm))]>,
2370 bits<4> Rd;
2374 let Inst{11-8} = Rd;
2388 let Constraints = "$src = $Rd" in
2389 def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm),
2390 IIC_iUNAsi, "bfc", "\t$Rd, $imm",
2391 [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]> {
2406 (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm1_32:$msb),
2407 IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $lsb, $msb", []> {
2415 (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm1_32:$msb),
2416 IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $lsb, $msb", []> {
2437 let Constraints = "$src = $Rd" in {
2438 def t2BFI : T2TwoRegBitFI<(outs rGPR:$Rd),
2440 IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm",
2441 [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn,
2468 def i : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), iii,
2469 opc, "\t$Rd, $imm",
2470 [(set rGPR:$Rd, (opnode t2_so_imm:$imm))]>, Sched<[WriteALU]> {
2481 def r : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), iir,
2482 opc, ".w\t$Rd, $Rm",
2483 [(set rGPR:$Rd, (opnode rGPR:$Rm))]>, Sched<[WriteALU]> {
2493 def s : T2sOneRegShiftedReg<(outs rGPR:$Rd), (ins t2_so_reg:$ShiftedRm), iis,
2494 opc, ".w\t$Rd, $ShiftedRm",
2495 [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm))]>,
2537 def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2538 "mul", "\t$Rd, $Rn, $Rm",
2539 [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> {
2548 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2549 "mla", "\t$Rd, $Rn, $Rm, $Ra",
2550 [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]>,
2559 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2560 "mls", "\t$Rd, $Rn, $Rm, $Ra",
2561 [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]>,
2607 def t2SMMUL : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2608 "smmul", "\t$Rd, $Rn, $Rm",
2609 [(set rGPR:$Rd, (mulhs rGPR:$Rn, rGPR:$Rm))]>,
2618 def t2SMMULR : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2619 "smmulr", "\t$Rd, $Rn, $Rm", []>,
2629 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2630 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
2631 [(set rGPR:$Rd, (add (mulhs rGPR:$Rm, rGPR:$Rn), rGPR:$Ra))]>,
2640 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2641 "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,
2650 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2651 "smmls", "\t$Rd, $Rn, $Rm, $Ra",
2652 [(set rGPR:$Rd, (sub rGPR:$Ra, (mulhs rGPR:$Rn, rGPR:$Rm)))]>,
2661 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2662 "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
2671 def BB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2672 !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm",
2673 [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16),
2684 def BT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2685 !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm",
2686 [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16),
2697 def TB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2698 !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm",
2699 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2710 def TT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2711 !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm",
2712 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2723 def WB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2724 !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm",
2735 def WT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2736 !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm",
2751 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2752 !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm, $Ra",
2753 [(set rGPR:$Rd, (add rGPR:$Ra,
2765 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2766 !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm, $Ra",
2767 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sext_inreg rGPR:$Rn, i16),
2778 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2779 !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm, $Ra",
2780 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)),
2791 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2792 !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm, $Ra",
2793 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)),
2804 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2805 !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm, $Ra",
2816 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2817 !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm, $Ra",
2832 def t2SMLALBB : T2FourReg_mac<1, 0b100, 0b1000, (outs rGPR:$Ra,rGPR:$Rd),
2833 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbb", "\t$Ra, $Rd, $Rn, $Rm",
2836 def t2SMLALBT : T2FourReg_mac<1, 0b100, 0b1001, (outs rGPR:$Ra,rGPR:$Rd),
2837 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbt", "\t$Ra, $Rd, $Rn, $Rm",
2840 def t2SMLALTB : T2FourReg_mac<1, 0b100, 0b1010, (outs rGPR:$Ra,rGPR:$Rd),
2841 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm",
2844 def t2SMLALTT : T2FourReg_mac<1, 0b100, 0b1011, (outs rGPR:$Ra,rGPR:$Rd),
2845 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltt", "\t$Ra, $Rd, $Rn, $Rm",
2851 0, 0b010, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2852 IIC_iMAC32, "smuad", "\t$Rd, $Rn, $Rm", []>,
2857 0, 0b010, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2858 IIC_iMAC32, "smuadx", "\t$Rd, $Rn, $Rm", []>,
2863 0, 0b100, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2864 IIC_iMAC32, "smusd", "\t$Rd, $Rn, $Rm", []>,
2869 0, 0b100, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2870 IIC_iMAC32, "smusdx", "\t$Rd, $Rn, $Rm", []>,
2875 0, 0b010, 0b0000, (outs rGPR:$Rd),
2877 "\t$Rd, $Rn, $Rm, $Ra", []>,
2880 0, 0b010, 0b0001, (outs rGPR:$Rd),
2882 "\t$Rd, $Rn, $Rm, $Ra", []>,
2884 def t2SMLSD : T2FourReg_mac<0, 0b100, 0b0000, (outs rGPR:$Rd),
2886 "\t$Rd, $Rn, $Rm, $Ra", []>,
2888 def t2SMLSDX : T2FourReg_mac<0, 0b100, 0b0001, (outs rGPR:$Rd),
2890 "\t$Rd, $Rn, $Rm, $Ra", []>,
2892 def t2SMLALD : T2FourReg_mac<1, 0b100, 0b1100, (outs rGPR:$Ra,rGPR:$Rd),
2894 "\t$Ra, $Rd, $Rn, $Rm", []>,
2896 def t2SMLALDX : T2FourReg_mac<1, 0b100, 0b1101, (outs rGPR:$Ra,rGPR:$Rd),
2898 "\t$Ra, $Rd, $Rn, $Rm", []>,
2900 def t2SMLSLD : T2FourReg_mac<1, 0b101, 0b1100, (outs rGPR:$Ra,rGPR:$Rd),
2902 "\t$Ra, $Rd, $Rn, $Rm", []>,
2904 def t2SMLSLDX : T2FourReg_mac<1, 0b101, 0b1101, (outs rGPR:$Ra,rGPR:$Rd),
2906 "\t$Ra, $Rd, $Rn, $Rm", []>,
2913 def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iDIV,
2914 "sdiv", "\t$Rd, $Rn, $Rm",
2915 [(set rGPR:$Rd, (sdiv rGPR:$Rn, rGPR:$Rm))]>,
2924 def t2UDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iDIV,
2925 "udiv", "\t$Rd, $Rn, $Rm",
2926 [(set rGPR:$Rd, (udiv rGPR:$Rn, rGPR:$Rm))]>,
2951 def t2CLZ : T2I_misc<0b11, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2952 "clz", "\t$Rd, $Rm", [(set rGPR:$Rd, (ctlz rGPR:$Rm))]>,
2955 def t2RBIT : T2I_misc<0b01, 0b10, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2956 "rbit", "\t$Rd, $Rm",
2957 [(set rGPR:$Rd, (bitreverse rGPR:$Rm))]>,
2960 def t2REV : T2I_misc<0b01, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2961 "rev", ".w\t$Rd, $Rm", [(set rGPR:$Rd, (bswap rGPR:$Rm))]>,
2964 def t2REV16 : T2I_misc<0b01, 0b01, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2965 "rev16", ".w\t$Rd, $Rm",
2966 [(set rGPR:$Rd, (rotr (bswap rGPR:$Rm), (i32 16)))]>,
2969 def t2REVSH : T2I_misc<0b01, 0b11, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2970 "revsh", ".w\t$Rd, $Rm",
2971 [(set rGPR:$Rd, (sra (bswap rGPR:$Rm), (i32 16)))]>,
2979 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, pkh_lsl_amt:$sh),
2980 IIC_iBITsi, "pkhbt", "\t$Rd, $Rn, $Rm$sh",
2981 [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF),
3008 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, pkh_asr_amt:$sh),
3009 IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm$sh",
3010 [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF0000),
3050 : T2ThreeRegNoP<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), NoItinerary,
3051 !strconcat("crc32", suffix, "\t$Rd, $Rn, $Rm"),
3052 [(set rGPR:$Rd, (builtin rGPR:$Rn, rGPR:$Rm))]>,
3094 let Inst{11-8} = 0b1111; // Rd
3107 let Inst{11-8} = 0b1111; // Rd
3122 let Inst{11-8} = 0b1111; // Rd
3151 def t2MOVCCr : t2PseudoInst<(outs rGPR:$Rd),
3154 [(set rGPR:$Rd, (ARMcmov rGPR:$false, rGPR:$Rm,
3156 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3160 : t2PseudoInst<(outs rGPR:$Rd),
3163 [(set rGPR:$Rd, (ARMcmov rGPR:$false,t2_so_imm:$imm,
3165 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3170 : t2PseudoInst<(outs rGPR:$Rd),
3173 [(set rGPR:$Rd, (ARMcmov rGPR:$false, imm0_65535:$imm,
3175 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3179 : t2PseudoInst<(outs rGPR:$Rd),
3182 [(set rGPR:$Rd,
3185 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3188 : t2PseudoInst<(outs rGPR:$Rd),
3191 [(set rGPR:$Rd, (ARMcmov rGPR:$false,
3194 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3268 bits<4> Rd;
3271 let Inst{3-0} = Rd;
3349 let mayStore = 1, Constraints = "@earlyclobber $Rd" in {
3350 def t2STREXB : T2I_strex<0b0100, (outs rGPR:$Rd),
3353 "strexb", "\t$Rd, $Rt, $addr", "",
3354 [(set rGPR:$Rd,
3357 def t2STREXH : T2I_strex<0b0101, (outs rGPR:$Rd),
3360 "strexh", "\t$Rd, $Rt, $addr", "",
3361 [(set rGPR:$Rd,
3365 def t2STREX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
3368 "strex", "\t$Rd, $Rt, $addr", "",
3369 [(set rGPR:$Rd,
3372 bits<4> Rd;
3379 let Inst{11-8} = Rd;
3383 def t2STREXD : T2I_strex<0b0111, (outs rGPR:$Rd),
3386 "strexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
3392 def t2STLEXB : T2I_strex<0b1100, (outs rGPR:$Rd),
3395 "stlexb", "\t$Rd, $Rt, $addr", "",
3396 [(set rGPR:$Rd,
3401 def t2STLEXH : T2I_strex<0b1101, (outs rGPR:$Rd),
3404 "stlexh", "\t$Rd, $Rt, $addr", "",
3405 [(set rGPR:$Rd,
3410 def t2STLEX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
3413 "stlex", "\t$Rd, $Rt, $addr", "",
3414 [(set rGPR:$Rd,
3417 bits<4> Rd;
3425 let Inst{3-0} = Rd;
3428 def t2STLEXD : T2I_strex<0b1111, (outs rGPR:$Rd),
3431 "stlexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
4028 def t2MRS_AR : T2I<(outs GPR:$Rd), (ins), NoItinerary, "mrs", "\t$Rd, apsr",
4030 bits<4> Rd;
4032 let Inst{11-8} = Rd;
4036 def : t2InstAlias<"mrs${p} $Rd, cpsr", (t2MRS_AR GPR:$Rd, pred:$p)>;
4038 def t2MRSsys_AR: T2I<(outs GPR:$Rd), (ins), NoItinerary, "mrs", "\t$Rd, spsr",
4040 bits<4> Rd;
4042 let Inst{11-8} = Rd;
4046 def t2MRSbanked : T2I<(outs rGPR:$Rd), (ins banked_reg:$banked),
4047 NoItinerary, "mrs", "\t$Rd, $banked", []>,
4050 bits<4> Rd;
4056 let Inst{11-8} = Rd;
4067 def t2MRS_M : T2I<(outs rGPR:$Rd), (ins msr_mask:$SYSm), NoItinerary,
4068 "mrs", "\t$Rd, $SYSm", []>,
4070 bits<4> Rd;
4073 let Inst{11-8} = Rd;
4449 def : t2InstAlias<"adc${s}${p} $Rd, $Rn, $Rm",
4450 (t2ADCrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4451 def : t2InstAlias<"adc${s}${p} $Rd, $Rn, $ShiftedRm",
4452 (t2ADCrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$ShiftedRm,
4456 def : t2InstAlias<"sbc${s}${p} $Rd, $Rn, $Rm",
4457 (t2SBCrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4458 def : t2InstAlias<"sbc${s}${p} $Rd, $Rn, $ShiftedRm",
4459 (t2SBCrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$ShiftedRm,
4463 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4464 (t2ADDri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p,
4466 def : t2InstAlias<"add${p} $Rd, $Rn, $imm",
4467 (t2ADDri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p)>;
4468 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $Rm",
4469 (t2ADDrr GPRnopc:$Rd, GPRnopc:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4470 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $ShiftedRm",
4471 (t2ADDrs GPRnopc:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm,
4485 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4486 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm, pred:$p,
4488 def : t2InstAlias<"add${p} $Rd, $Rn, $imm",
4489 (t2SUBri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
4496 def : t2InstAlias<"add${s}${p}.w $Rd, $Rn, $imm",
4497 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm, pred:$p,
4499 def : t2InstAlias<"addw${p} $Rd, $Rn, $imm",
4500 (t2SUBri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
4509 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $imm",
4510 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4511 def : t2InstAlias<"sub${p} $Rd, $Rn, $imm",
4512 (t2SUBri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p)>;
4513 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $Rm",
4514 (t2SUBrr GPRnopc:$Rd, GPRnopc:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4515 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $ShiftedRm",
4516 (t2SUBrs GPRnopc:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm,
4580 def : t2InstAlias<"mvn${s}${p}.w $Rd, $imm",
4581 (t2MVNi rGPR:$Rd, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4582 def : t2InstAlias<"mvn${s}${p} $Rd, $Rm",
4583 (t2MVNr rGPR:$Rd, rGPR:$Rm, pred:$p, cc_out:$s)>;
4584 def : t2InstAlias<"mvn${s}${p} $Rd, $ShiftedRm",
4585 (t2MVNs rGPR:$Rd, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s)>;
4589 def : InstAlias<"pkhbt${p} $Rd, $Rn, $Rm",
4590 (t2PKHBT rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4592 def : InstAlias<"pkhtb${p} $Rd, $Rn, $Rm",
4593 (t2PKHBT rGPR:$Rd, rGPR:$Rm, rGPR:$Rn, 0, pred:$p), 0>,
4627 def : t2InstAlias<"rev${p} $Rd, $Rm", (t2REV rGPR:$Rd, rGPR:$Rm, pred:$p)>;
4628 def : t2InstAlias<"rev16${p} $Rd, $Rm", (t2REV16 rGPR:$Rd, rGPR:$Rm, pred:$p)>;
4629 def : t2InstAlias<"revsh${p} $Rd, $Rm", (t2REVSH rGPR:$Rd, rGPR:$Rm, pred:$p)>;
4634 def : t2InstAlias<"rsb${s}${p} $Rd, $Rn, $imm",
4635 (t2RSBri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4645 def : t2InstAlias<"ssat${p} $Rd, $sat_imm, $Rn",
4646 (t2SSAT rGPR:$Rd, imm1_32:$sat_imm, rGPR:$Rn, 0, pred:$p)>;
4647 def : t2InstAlias<"usat${p} $Rd, $sat_imm, $Rn",
4648 (t2USAT rGPR:$Rd, imm0_31:$sat_imm, rGPR:$Rn, 0, pred:$p)>;
4671 def : InstAlias<"sxtab${p} $Rd, $Rn, $Rm",
4672 (t2SXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4674 def : InstAlias<"sxtah${p} $Rd, $Rn, $Rm",
4675 (t2SXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4677 def : InstAlias<"sxtab16${p} $Rd, $Rn, $Rm",
4678 (t2SXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4680 def : InstAlias<"sxtb16${p} $Rd, $Rm",
4681 (t2SXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p), 0>,
4684 def : t2InstAlias<"sxtb${p} $Rd, $Rm",
4685 (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4686 def : t2InstAlias<"sxth${p} $Rd, $Rm",
4687 (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4688 def : t2InstAlias<"sxtb${p}.w $Rd, $Rm",
4689 (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4690 def : t2InstAlias<"sxth${p}.w $Rd, $Rm",
4691 (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4693 def : InstAlias<"uxtab${p} $Rd, $Rn, $Rm",
4694 (t2UXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4696 def : InstAlias<"uxtah${p} $Rd, $Rn, $Rm",
4697 (t2UXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4699 def : InstAlias<"uxtab16${p} $Rd, $Rn, $Rm",
4700 (t2UXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p), 0>,
4702 def : InstAlias<"uxtb16${p} $Rd, $Rm",
4703 (t2UXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p), 0>,
4706 def : t2InstAlias<"uxtb${p} $Rd, $Rm",
4707 (t2UXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4708 def : t2InstAlias<"uxth${p} $Rd, $Rm",
4709 (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4710 def : t2InstAlias<"uxtb${p}.w $Rd, $Rm",
4711 (t2UXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4712 def : t2InstAlias<"uxth${p}.w $Rd, $Rm",
4713 (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4716 def : t2InstAlias<"uxtb${p} $Rd, $Rm$rot",
4717 (t2UXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4718 def : InstAlias<"uxtb16${p} $Rd, $Rm$rot",
4719 (t2UXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p), 0>,
4721 def : t2InstAlias<"uxth${p} $Rd, $Rm$rot",
4722 (t2UXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4724 def : t2InstAlias<"sxtb${p} $Rd, $Rm$rot",
4725 (t2SXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4726 def : InstAlias<"sxtb16${p} $Rd, $Rm$rot",
4727 (t2SXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p), 0>,
4729 def : t2InstAlias<"sxth${p} $Rd, $Rm$rot",
4730 (t2SXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4733 // "mov Rd, t2_so_imm_not" can be handled via "mvn" in assembly, just like
4735 def : t2InstAlias<"mov${p} $Rd, $imm",
4736 (t2MVNi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>;
4737 def : t2InstAlias<"mvn${p} $Rd, $imm",
4738 (t2MOVi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>;
4740 def : t2InstAlias<"bic${s}${p} $Rd, $Rn, $imm",
4741 (t2ANDri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
4746 def : t2InstAlias<"and${s}${p} $Rd, $Rn, $imm",
4747 (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
4752 // Likewise, "add Rd, t2_so_imm_neg" -> sub
4753 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4754 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm,
4756 def : t2InstAlias<"add${s}${p} $Rd, $imm",
4757 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rd, t2_so_imm_neg:$imm,
4760 def : t2InstAlias<"cmp${p} $Rd, $imm",
4761 (t2CMNri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
4762 def : t2InstAlias<"cmn${p} $Rd, $imm",
4763 (t2CMPri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
4771 def : t2InstAlias<"neg${s}${p} $Rd, $Rm",
4772 (t2RSBri rGPR:$Rd, rGPR:$Rm, 0, pred:$p, cc_out:$s)>;
4776 def t2MOVsi: t2AsmPseudo<"mov${p} $Rd, $shift",
4777 (ins rGPR:$Rd, t2_so_reg:$shift, pred:$p)>;
4778 def t2MOVSsi: t2AsmPseudo<"movs${p} $Rd, $shift",
4779 (ins rGPR:$Rd, t2_so_reg:$shift, pred:$p)>;
4781 def t2MOVsr: t2AsmPseudo<"mov${p} $Rd, $shift",
4782 (ins rGPR:$Rd, so_reg_reg:$shift, pred:$p)>;
4783 def t2MOVSsr: t2AsmPseudo<"movs${p} $Rd, $shift",
4784 (ins rGPR:$Rd, so_reg_reg:$shift, pred:$p)>;
4787 def : t2InstAlias<"adr${p} $Rd, $addr",
4788 (t2ADR rGPR:$Rd, t2adrlabel:$addr, pred:$p)>;
4813 def : t2InstAlias<"add${p} $Rd, pc, $imm",
4814 (t2ADR rGPR:$Rd, imm0_4095:$imm, pred:$p)>;