Lines Matching refs:MO2
82 const MCOperand &MO2 = MI->getOperand(2); in printInst() local
95 printRegName(O, MO2.getReg()); in printInst()
105 const MCOperand &MO2 = MI->getOperand(2); in printInst() local
107 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); in printInst()
116 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { in printInst()
122 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">"); in printInst()
346 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand() local
358 printRegName(O, MO2.getReg()); in printSORegRegOperand()
366 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand() local
371 printRegImmShift(O, ARM_AM::getSORegShOp(MO2.getImm()), in printSORegImmOperand()
372 ARM_AM::getSORegOffset(MO2.getImm()), UseMarkup); in printSORegImmOperand()
383 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM2PreOrOffsetIndexOp() local
389 if (!MO2.getReg()) { in printAM2PreOrOffsetIndexOp()
401 printRegName(O, MO2.getReg()); in printAM2PreOrOffsetIndexOp()
412 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBB() local
416 printRegName(O, MO2.getReg()); in printAddrModeTBB()
424 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBH() local
428 printRegName(O, MO2.getReg()); in printAddrModeTBH()
456 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand() local
459 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm()); in printAddrMode2OffsetOperand()
461 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm())) << ImmOffs in printAddrMode2OffsetOperand()
466 O << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm())); in printAddrMode2OffsetOperand()
469 printRegImmShift(O, ARM_AM::getAM2ShiftOpc(MO2.getImm()), in printAddrMode2OffsetOperand()
470 ARM_AM::getAM2Offset(MO2.getImm()), UseMarkup); in printAddrMode2OffsetOperand()
481 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM3PreOrOffsetIndexOp() local
487 if (MO2.getReg()) { in printAM3PreOrOffsetIndexOp()
489 printRegName(O, MO2.getReg()); in printAM3PreOrOffsetIndexOp()
526 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand() local
529 O << getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm())); in printAddrMode3OffsetOperand()
534 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm()); in printAddrMode3OffsetOperand()
536 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm())) << ImmOffs in printAddrMode3OffsetOperand()
553 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand() local
555 O << (MO2.getImm() ? "" : "-"); in printPostIdxRegOperand()
581 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand() local
591 unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm()); in printAddrMode5Operand()
592 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm()); in printAddrMode5Operand()
605 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand() local
615 unsigned ImmOffs = ARM_AM::getAM5FP16Offset(MO2.getImm()); in printAddrMode5FP16Operand()
616 unsigned Op = ARM_AM::getAM5FP16Op(MO2.getImm()); in printAddrMode5FP16Operand()
621 << ARM_AM::getAddrOpcStr(ARM_AM::getAM5FP16Op(MO2.getImm())) in printAddrMode5FP16Operand()
632 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand() local
636 if (MO2.getImm()) { in printAddrMode6Operand()
637 O << ":" << (MO2.getImm() << 3); in printAddrMode6Operand()
1130 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeRROperand() local
1139 if (unsigned RegNum = MO2.getReg()) { in printThumbAddrModeRROperand()
1152 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeImm5SOperand() local
1161 if (unsigned ImmOffs = MO2.getImm()) { in printThumbAddrModeImm5SOperand()
1203 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand() local
1209 assert(MO2.isImm() && "Not a valid t2_so_reg value!"); in printT2SOOperand()
1210 printRegImmShift(O, ARM_AM::getSORegShOp(MO2.getImm()), in printT2SOOperand()
1211 ARM_AM::getSORegOffset(MO2.getImm()), UseMarkup); in printT2SOOperand()
1219 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand() local
1229 int32_t OffImm = (int32_t)MO2.getImm(); in printAddrModeImm12Operand()
1248 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand() local
1253 int32_t OffImm = (int32_t)MO2.getImm(); in printT2AddrModeImm8Operand()
1272 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand() local
1282 int32_t OffImm = (int32_t)MO2.getImm(); in printT2AddrModeImm8s4Operand()
1302 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand() local
1306 if (MO2.getImm()) { in printT2AddrModeImm0_1020s4Operand()
1307 O << ", " << markup("<imm:") << "#" << formatImm(MO2.getImm() * 4) in printT2AddrModeImm0_1020s4Operand()
1351 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand() local
1357 assert(MO2.getReg() && "Invalid so_reg load / store address!"); in printT2AddrModeSoRegOperand()
1359 printRegName(O, MO2.getReg()); in printT2AddrModeSoRegOperand()