Lines Matching refs:analyzeBranch

439   bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false);  in findInductionRegister()
586   bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false);  in getLoopTripCount()
598     bool NotAnalyzed = TII->analyzeBranch(*Latch, LTB, LFB, LCond, false);  in getLoopTripCount()
1189     if (TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false))  in convertToHardwareLoop()
1428     if (TII->analyzeBranch(*MI->getParent(), TBB, FBB, Cond, false))  in loopCountMayWrapOrUnderFlow()
1624   bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false);  in fixupInductionVariable()
1631     bool NotAnalyzed = TII->analyzeBranch(*Latch, LTB, LFB, LCond, false);  in fixupInductionVariable()
1842   if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false))  in createPreheaderForLoop()
1847     bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp1, false);  in createPreheaderForLoop()
1933       bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp2, false);  in createPreheaderForLoop()
1945   bool LatchNotAnalyzed = TII->analyzeBranch(*Latch, TB, FB, Tmp2, false);  in createPreheaderForLoop()