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Lines Matching refs:MachineInstr

46   unsigned isLoadFromStackSlot(const MachineInstr &MI,
54   unsigned isStoreToStackSlot(const MachineInstr &MI,
109   bool analyzeLoop(MachineLoop &L, MachineInstr *&IndVarInst,
110                    MachineInstr *&CmpInst) const override;
117                            MachineInstr *IndVar, MachineInstr *Cmp,
119                            SmallVectorImpl<MachineInstr *> &PrevInsts,
189   bool expandPostRAPseudo(MachineInstr &MI) const override;
192   bool getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg,
206   bool isPredicated(const MachineInstr &MI) const override;
210   bool PredicateInstruction(MachineInstr &MI,
221   bool DefinesPredicate(MachineInstr &MI,
227   bool isPredicable(MachineInstr &MI) const override;
231   bool isSchedulingBoundary(const MachineInstr &MI,
250   bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
257                            const MachineInstr &MI,
269   areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb,
274   bool getBaseAndOffsetPosition(const MachineInstr *MI, unsigned &BasePos,
278   bool getIncrementValue(const MachineInstr *MI, int &Value) const override;
287   bool isAbsoluteSet(const MachineInstr* MI) const;
288   bool isAccumulator(const MachineInstr *MI) const;
289   bool isComplex(const MachineInstr *MI) const;
290   bool isCompoundBranchInstr(const MachineInstr *MI) const;
291   bool isCondInst(const MachineInstr *MI) const;
292   bool isConditionalALU32 (const MachineInstr* MI) const;
293   bool isConditionalLoad(const MachineInstr* MI) const;
294   bool isConditionalStore(const MachineInstr* MI) const;
295   bool isConditionalTransfer(const MachineInstr* MI) const;
296   bool isConstExtended(const MachineInstr *MI) const;
297   bool isDeallocRet(const MachineInstr *MI) const;
298   bool isDependent(const MachineInstr *ProdMI,
299                    const MachineInstr *ConsMI) const;
300   bool isDotCurInst(const MachineInstr* MI) const;
301   bool isDotNewInst(const MachineInstr* MI) const;
302   bool isDuplexPair(const MachineInstr *MIa, const MachineInstr *MIb) const;
303   bool isEarlySourceInstr(const MachineInstr *MI) const;
306   bool isExtendable(const MachineInstr* MI) const;
307   bool isExtended(const MachineInstr* MI) const;
308   bool isFloat(const MachineInstr *MI) const;
309   bool isHVXMemWithAIndirect(const MachineInstr *I,
310                              const MachineInstr *J) const;
311   bool isIndirectCall(const MachineInstr *MI) const;
312   bool isIndirectL4Return(const MachineInstr *MI) const;
313   bool isJumpR(const MachineInstr *MI) const;
314   bool isJumpWithinBranchRange(const MachineInstr *MI, unsigned offset) const;
315   bool isLateInstrFeedsEarlyInstr(const MachineInstr *LRMI,
316                                   const MachineInstr *ESMI) const;
317   bool isLateResultInstr(const MachineInstr *MI) const;
318   bool isLateSourceInstr(const MachineInstr *MI) const;
319   bool isLoopN(const MachineInstr *MI) const;
320   bool isMemOp(const MachineInstr *MI) const;
321   bool isNewValue(const MachineInstr* MI) const;
323   bool isNewValueInst(const MachineInstr* MI) const;
324   bool isNewValueJump(const MachineInstr* MI) const;
326   bool isNewValueStore(const MachineInstr* MI) const;
328   bool isOperandExtended(const MachineInstr *MI, unsigned OperandNum) const;
329   bool isPostIncrement(const MachineInstr* MI) const override;
330   bool isPredicatedNew(const MachineInstr &MI) const;
332   bool isPredicatedTrue(const MachineInstr &MI) const;
337   bool isSaveCalleeSavedRegsCall(const MachineInstr *MI) const;
338   bool isSignExtendingLoad(const MachineInstr &MI) const;
339   bool isSolo(const MachineInstr* MI) const;
340   bool isSpillPredRegOp(const MachineInstr *MI) const;
341   bool isTailCall(const MachineInstr *MI) const;
342   bool isTC1(const MachineInstr *MI) const;
343   bool isTC2(const MachineInstr *MI) const;
344   bool isTC2Early(const MachineInstr *MI) const;
345   bool isTC4x(const MachineInstr *MI) const;
346   bool isV60VectorInstruction(const MachineInstr *MI) const;
349   bool isVecAcc(const MachineInstr *MI) const;
350   bool isVecALU(const MachineInstr *MI) const;
351   bool isVecUsableNextPacket(const MachineInstr *ProdMI,
352                              const MachineInstr *ConsMI) const;
353   bool isZeroExtendingLoad(const MachineInstr &MI) const;
355   bool canExecuteInBundle(const MachineInstr *First,
356                           const MachineInstr *Second) const;
358   bool hasNonExtEquivalent(const MachineInstr *MI) const;
359   bool hasPseudoInstrPair(const MachineInstr *MI) const;
361   bool mayBeCurLoad(const MachineInstr* MI) const;
362   bool mayBeNewStore(const MachineInstr* MI) const;
363   bool producesStall(const MachineInstr *ProdMI,
364                      const MachineInstr *ConsMI) const;
365   bool producesStall(const MachineInstr *MI,
367   bool predCanBeUsedAsDotNew(const MachineInstr *MI, unsigned PredReg) const;
372   short getAbsoluteForm(const MachineInstr *MI) const;
373   unsigned getAddrMode(const MachineInstr* MI) const;
374   unsigned getBaseAndOffset(const MachineInstr *MI, int &Offset,
377   short getBaseWithLongOffset(const MachineInstr *MI) const;
378   short getBaseWithRegOffset(const MachineInstr *MI) const;
379   SmallVector<MachineInstr*,2> getBranchingInstrs(MachineBasicBlock& MBB) const;
380   unsigned getCExtOpNum(const MachineInstr *MI) const;
382   getCompoundCandidateGroup(const MachineInstr *MI) const;
383   unsigned getCompoundOpcode(const MachineInstr *GA,
384                              const MachineInstr *GB) const;
386   int getDotCurOp(const MachineInstr* MI) const;
387   int getDotNewOp(const MachineInstr* MI) const;
388   int getDotNewPredJumpOp(const MachineInstr *MI,
390   int getDotNewPredOp(const MachineInstr *MI,
393   HexagonII::SubInstructionGroup getDuplexCandidateGroup(const MachineInstr *MI)
395   short getEquivalentHWInstr(const MachineInstr *MI) const;
396   MachineInstr *getFirstNonDbgInst(MachineBasicBlock *BB) const;
398                                       const MachineInstr *MI) const;
401   int getMaxValue(const MachineInstr *MI) const;
402   unsigned getMemAccessSize(const MachineInstr* MI) const;
403   int getMinValue(const MachineInstr *MI) const;
404   short getNonExtOpcode(const MachineInstr *MI) const;
407   short getPseudoInstrPair(const MachineInstr *MI) const;
408   short getRegForm(const MachineInstr *MI) const;
409   unsigned getSize(const MachineInstr *MI) const;
410   uint64_t getType(const MachineInstr* MI) const;
411   unsigned getUnits(const MachineInstr* MI) const;
421   void immediateExtend(MachineInstr *MI) const;
422   bool invertAndChangeJumpTarget(MachineInstr* MI,
425   bool reversePredSense(MachineInstr* MI) const;
428   short xformRegToImmOffset(const MachineInstr *MI) const;