133   bool emitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
279   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in emitLogicalOp()  local
280   if (!ResultReg)  in emitLogicalOp()
283   emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg);  in emitLogicalOp()
284   return ResultReg;  in emitLogicalOp()
298     unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in fastMaterializeAlloca()  local
300             ResultReg)  in fastMaterializeAlloca()
303     return ResultReg;  in fastMaterializeAlloca()
319   unsigned ResultReg = createResultReg(RC);  in materialize32BitInt()  local
323     emitInst(Opc, ResultReg).addReg(Mips::ZERO).addImm(Imm);  in materialize32BitInt()
324     return ResultReg;  in materialize32BitInt()
326     emitInst(Mips::ORi, ResultReg).addReg(Mips::ZERO).addImm(Imm);  in materialize32BitInt()
327     return ResultReg;  in materialize32BitInt()
335     emitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo);  in materialize32BitInt()
337     emitInst(Mips::LUi, ResultReg).addImm(Hi);  in materialize32BitInt()
339   return ResultReg;  in materialize32BitInt()
595 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) {  in emitCmp()  argument
612     emitInst(Mips::SLTiu, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
618     emitInst(Mips::SLTu, ResultReg).addReg(Mips::ZERO).addReg(TempReg);  in emitCmp()
622     emitInst(Mips::SLTu, ResultReg).addReg(RightReg).addReg(LeftReg);  in emitCmp()
626     emitInst(Mips::SLTu, ResultReg).addReg(LeftReg).addReg(RightReg);  in emitCmp()
632     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
638     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
642     emitInst(Mips::SLT, ResultReg).addReg(RightReg).addReg(LeftReg);  in emitCmp()
646     emitInst(Mips::SLT, ResultReg).addReg(LeftReg).addReg(RightReg);  in emitCmp()
652     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
658     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
708     emitInst(CondMovOpc, ResultReg)  in emitCmp()
717 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr,  in emitLoad()  argument
725     ResultReg = createResultReg(&Mips::GPR32RegClass);  in emitLoad()
730     ResultReg = createResultReg(&Mips::GPR32RegClass);  in emitLoad()
735     ResultReg = createResultReg(&Mips::GPR32RegClass);  in emitLoad()
742     ResultReg = createResultReg(&Mips::FGR32RegClass);  in emitLoad()
749     ResultReg = createResultReg(&Mips::AFGR64RegClass);  in emitLoad()
758     emitInstLoad(Opc, ResultReg, Addr.getReg(), Addr.getOffset());  in emitLoad()
769     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)  in emitLoad()
835   unsigned ResultReg;  in selectLogicalOp()  local
840     ResultReg = emitLogicalOp(ISD::AND, VT, I->getOperand(0), I->getOperand(1));  in selectLogicalOp()
843     ResultReg = emitLogicalOp(ISD::OR, VT, I->getOperand(0), I->getOperand(1));  in selectLogicalOp()
846     ResultReg = emitLogicalOp(ISD::XOR, VT, I->getOperand(0), I->getOperand(1));  in selectLogicalOp()
850   if (!ResultReg)  in selectLogicalOp()
853   updateValueMap(I, ResultReg);  in selectLogicalOp()
872   unsigned ResultReg;  in selectLoad()  local
873   if (!emitLoad(VT, ResultReg, Addr, cast<LoadInst>(I)->getAlignment()))  in selectLoad()
875   updateValueMap(I, ResultReg);  in selectLoad()
940   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in selectCmp()  local
941   if (!emitCmp(ResultReg, CI))  in selectCmp()
943   updateValueMap(I, ResultReg);  in selectCmp()
1008   unsigned ResultReg = createResultReg(RC);  in selectSelect()  local
1011   if (!ResultReg || !TempReg)  in selectSelect()
1015   emitInst(CondMovOpc, ResultReg)  in selectSelect()
1017   updateValueMap(I, ResultReg);  in selectSelect()
1238     unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT));  in finishCall()  local
1239     if (!ResultReg)  in finishCall()
1243             ResultReg).addReg(RVLocs[0].getLocReg());  in finishCall()
1246     CLI.ResultReg = ResultReg;  in finishCall()
1568   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in selectIntExt()  local
1570   if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))  in selectIntExt()
1572   updateValueMap(I, ResultReg);  in selectIntExt()
1692   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in selectDivRem()  local
1693   if (!ResultReg)  in selectDivRem()
1699   emitInst(MFOpc, ResultReg);  in selectDivRem()
1701   updateValueMap(I, ResultReg);  in selectDivRem()
1711   unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);  in selectShift()  local
1712   if (!ResultReg)  in selectShift()
1752     emitInst(Opcode, ResultReg).addReg(Op0Reg).addImm(ShiftVal);  in selectShift()
1753     updateValueMap(I, ResultReg);  in selectShift()
1775   emitInst(Opcode, ResultReg).addReg(Op0Reg).addReg(Op1Reg);  in selectShift()
1776   updateValueMap(I, ResultReg);  in selectShift()
1877     unsigned ResultReg = createResultReg(RC);  in fastEmitInst_rr()  local
1881     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg)  in fastEmitInst_rr()
1886     return ResultReg;  in fastEmitInst_rr()