Lines Matching refs:SrcVT
139 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
140 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
143 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
145 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
146 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
148 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
952 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPExt() local
955 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt()
1026 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPTrunc() local
1029 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc()
1049 MVT DstVT, SrcVT; in selectFPToInt() local
1062 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt()
1065 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in selectFPToInt()
1076 unsigned Opc = (SrcVT == MVT::f32) ? Mips::TRUNC_W_S : Mips::TRUNC_W_D32; in selectFPToInt()
1154 MVT SrcVT = ArgVT; in processCallArgs() local
1155 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
1162 MVT SrcVT = ArgVT; in processCallArgs() local
1163 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
1530 EVT SrcVT, DestVT; in selectTrunc() local
1531 SrcVT = TLI.getValueType(DL, Op->getType(), true); in selectTrunc()
1534 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in selectTrunc()
1566 MVT SrcVT = SrcEVT.getSimpleVT(); in selectIntExt() local
1570 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt)) in selectIntExt()
1575 bool MipsFastISel::emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt32r1() argument
1578 switch (SrcVT.SimpleTy) { in emitIntSExt32r1()
1594 bool MipsFastISel::emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt32r2() argument
1596 switch (SrcVT.SimpleTy) { in emitIntSExt32r2()
1609 bool MipsFastISel::emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt() argument
1614 return emitIntSExt32r2(SrcVT, SrcReg, DestVT, DestReg); in emitIntSExt()
1615 return emitIntSExt32r1(SrcVT, SrcReg, DestVT, DestReg); in emitIntSExt()
1618 bool MipsFastISel::emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntZExt() argument
1622 switch (SrcVT.SimpleTy) { in emitIntZExt()
1640 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntExt() argument
1647 ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) && (SrcVT != MVT::i16))) in emitIntExt()
1650 return emitIntZExt(SrcVT, SrcReg, DestVT, DestReg); in emitIntExt()
1651 return emitIntSExt(SrcVT, SrcReg, DestVT, DestReg); in emitIntExt()
1654 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntExt() argument
1657 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt); in emitIntExt()