Lines Matching refs:SINT
6665 SDValue SINT = Op.getOperand(0); in LowerINT_TO_FP() local
6687 SINT, DAG.getConstant(2047, dl, MVT::i64)); in LowerINT_TO_FP()
6690 Round = DAG.getNode(ISD::OR, dl, MVT::i64, Round, SINT); in LowerINT_TO_FP()
6703 SINT, DAG.getConstant(53, dl, MVT::i32)); in LowerINT_TO_FP()
6709 SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT); in LowerINT_TO_FP()
6716 if (canReuseLoadAddress(SINT, MVT::i64, RLI, DAG)) { in LowerINT_TO_FP()
6722 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::SEXTLOAD)) { in LowerINT_TO_FP()
6732 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::ZEXTLOAD)) { in LowerINT_TO_FP()
6742 SINT.getOpcode() == ISD::SIGN_EXTEND) || in LowerINT_TO_FP()
6744 SINT.getOpcode() == ISD::ZERO_EXTEND)) && in LowerINT_TO_FP()
6745 SINT.getOperand(0).getValueType() == MVT::i32) { in LowerINT_TO_FP()
6753 DAG.getEntryNode(), dl, SINT.getOperand(0), FIdx, in LowerINT_TO_FP()
6770 Bits = DAG.getMemIntrinsicNode(SINT.getOpcode() == ISD::ZERO_EXTEND ? in LowerINT_TO_FP()
6775 Bits = DAG.getNode(ISD::BITCAST, dl, MVT::f64, SINT); in LowerINT_TO_FP()