Lines Matching refs:UnitSize
1260 static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMerge() argument
1264 assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) && in isVMerge()
1267 for (unsigned i = 0; i != 8/UnitSize; ++i) // Step over units in isVMerge()
1268 for (unsigned j = 0; j != UnitSize; ++j) { // Step over bytes within unit in isVMerge()
1269 if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j), in isVMerge()
1270 LHSStart+j+i*UnitSize) || in isVMerge()
1271 !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j), in isVMerge()
1272 RHSStart+j+i*UnitSize)) in isVMerge()
1284 bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGLShuffleMask() argument
1288 return isVMerge(N, UnitSize, 0, 0); in isVMRGLShuffleMask()
1290 return isVMerge(N, UnitSize, 0, 16); in isVMRGLShuffleMask()
1295 return isVMerge(N, UnitSize, 8, 8); in isVMRGLShuffleMask()
1297 return isVMerge(N, UnitSize, 8, 24); in isVMRGLShuffleMask()
1309 bool PPC::isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGHShuffleMask() argument
1313 return isVMerge(N, UnitSize, 8, 8); in isVMRGHShuffleMask()
1315 return isVMerge(N, UnitSize, 8, 24); in isVMRGHShuffleMask()
1320 return isVMerge(N, UnitSize, 0, 0); in isVMRGHShuffleMask()
1322 return isVMerge(N, UnitSize, 0, 16); in isVMRGHShuffleMask()